1. Understanding Block Protect (BP) Bits ️· Purpose: The Block Protect (BP) bits in the status register determine which blocks of flash memory are write-protected. This helps prevent accidental or unauthorized modifications to specific areas of the flash.
️· Status Register: The BP bits are part of the device's status register, which can be read and written to configure the memory's protection.
️· CMP Bit: The "CMP" bit (Compare) determines how the BP bits are interpreted. This is crucial; the interpretation *completely* changes the protection zones. I'm including this because it is mentioned at the end of each table.
2. GD25LE40C - Protection Schemes (CMP=0) ️· Interpretation: When CMP = 0, the BP bits define protection zones based on specific block numbers. It is a more granular block based protection.
️· Main Groups: The blocks are grouped in multiples of 4kb, 8kb and 16kb.
- Bottom Block Protection (1110, 1111): The lower most blocks are protected. The number of protected blocks depends on the exact BP combination.
- Upper Block Protection (1000, 1001, 1010, 1011): Protecting blocks starting from the upper addresses of the device.
️· Protection Zones: A large number of zones are possible, with the protection regions based on which combination of BP bits are set. Refer to the table for the specific addresses.
3. GD25LE40C - Protection Schemes (CMP=1) ️· Interpretation: When CMP = 1, the BP bits indicate the *start* of the protected region. Protection extends to the end of the flash memory. It provides a less granular, wider area protection.
️· Protection Zones: The tables describe the start addresses and the areas that are protected.
️· Simpler Configuration: This mode is generally simpler to configure as it provides broader protection.
4. GD25LE20C - Protection Schemes (CMP=0) ️· Similar to GD25LE40C: This device has a similar concept where the status register bits determine which blocks of flash memory are write-protected.
️· Smaller Flash Capacity: Compared to the GD25LE40C, the protection ranges are smaller due to the smaller flash capacity.
️· Interpreted Based on BP Bit Combination: The specific addresses of protected blocks change based on the combination of BP bits set in the status register.
Key Differences Between Devices
| Feature |
GD25LE40C |
GD25LE20C |
| Flash Capacity |
Larger |
Smaller |
| Granularity of Protection (CMP=0) |
Higher, more precise block-level protection |
Similar, but limited by smaller flash capacity |
| CMP=1: |
Broader Protection |
Similar |
Important Notes: ️· Datasheet is Essential: These tables are a summary. Always consult the official datasheet for the GD25LE40C or GD25LE20C flash memory device for complete and accurate details.
️· Programming Required: To utilize the Block Protect features, you're required to program the status register appropriately.