1. Device Overview: ️· Devices: GD25WD05C and GD25WD10C – These are flash memory devices.
️· Key Feature: They use a SPI (Serial Peripheral Interface) for communication.
2. Command Summary (Important for Programming/Reading):
| Command Name |
Command Code |
Description |
| Write Enable (WREN) |
06H |
Sets the Write Enable Latch (WEL) bit to 1 (required before programming/erasing/writing status). |
| Write Disable (WRDI) |
04H |
Resets the Write Enable Latch (WEL) bit to 0. |
| Read Status Register (RDSR) |
05H |
Reads the Status Register. |
| Write Status Register (WRSR) |
01H |
Writes to the Status Register (allows modifying Block Protection bits and Status Register Protect). Requires WEL to be set. |
| Read Data Bytes (READ) |
03H |
Reads data from memory (sequential reads, address auto-increment). |
| Fast Read |
0BH |
Reads data from memory at higher speed (sequential reads, address auto-increment). |
| Dual Output Fast Read |
3BH |
Reads data from memory at higher speed with dual output (2 bits per clock cycle). Sequential reads, address auto-increment. |
| Page Program (PP) |
02H |
Programs data to memory (requires WEL). Handles data beyond page boundaries. Programs up to 256 bytes at a time. |
3. Detailed Explanation of Key Commands & Processes ️· Write Enable (WREN) / Write Disable (WRDI): These are essential for controlling the ability to write to the flash memory. WEL must be set before any write operations.
️· Read Status Register (RDSR) / Write Status Register (WRSR):
- RDSR lets you read the status of the device, including the Write In Progress (WIP) bit, to determine if a write operation is in progress.
- WRSR allows modification of Block Protection (BP2, BP1, BP0) and Status Register Protection (SRP) bits. Requires the WEL bit to be set.
️· Page Program (PP):
- Writes data in pages (up to 256 bytes).
- Handles data beyond the page boundary by wrapping around to the beginning of the same page.
- A Write Enable must be performed first.
4. Key Timing Considerations: ️· tPP: The duration of the Page Program cycle.
️· tW: The duration of the Write Status Register cycle.
5. Addressing and Organization (Implicit from commands): ️· The devices use a 24-bit address space.
️· Page Program operates on pages of data (up to 256 bytes).
6. Device Specific IDs (for identification):
| Operation Code |
GD25WD05C |
GD25WD10C |
| 9FH |
C8 |
64 |
11 |
| 90H |
C8 |
|
10 |
| ABH |
|
|
05 |
In essence, the document provides a detailed guide on how to control and interact with these flash memory devices using SPI commands. Understanding these commands and their sequences is crucial for properly programming and reading data from them.