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ATPL230A Datenblatt(PDF) 114 Page - ATMEL Corporation

Teilenummer ATPL230A
Bauteilbeschribung  ATPL Series Power Line Communications Device
PDF  122 Pages
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Hersteller  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATPL230A Datenblatt(HTML) 114 Page - ATMEL Corporation

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ATPL230A [DATASHEET]
Atmel-43053J-ATPL230A-Datasheet_22-Sep-16
114
10.7
Power On Considerations
During power-on, PLL INIT pin should be tied to ground during 4 μs at least, in order to ensure proper system start up.
After releasing PLL INIT, the system will start no later than 612 μs.
After power-up system can be restarted by means of low active pulse (min 1.65 μs) in ARST or SRST. System full
operation starts after 410 μs (ARST pulse) or after 0.9 μs (SRST pulse).
In case of simultaneous tie down of more than one initialization pin the longest time for operation must be respected.
Figure 10-6. PLL INIT initialization diagram
FULL OPERATION
PLL INIT
ARST
SRST
> 4us
> 612us
> 410us
> 0.9us
> 1.65us*
> 1.65us*
SYSTEM
(*) 1.65us = 33*tclk



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