AT89C5131A-RDTIL datasheet(140/184 Pages) ATMEL

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140

AT89C5131A-L

4338F–USB–08/07

Table 97. UEPCONX Register

UEPCONX (S:D4h)

USB Endpoint X Control Register

Note:

1. (X = EPNUM set in UEPNUM Register UEPNUM (S:C7h) USB Endpoint Number)

Reset Value = 80h when UEPNUM = 0 (default Control Endpoint)

Reset Value = 00h otherwise for all other endpoints

EPEN

DTGL

EPDIR

EPTYPE1

EPTYPE0

Bit Number

Bit

Mnemonic

Description

EPEN

Endpoint Enable

Set this bit to enable the endpoint according to the device configuration.

Endpoint 0 will always be enabled after a hardware or USB bus reset and

participate in the device configuration.

Clear this bit to disable the endpoint according to the device configuration.

Reserved

The value read from this bit is always 0. Do not set this bit.

Reserved

The value read from this bit is always 0. Do not set this bit.

Reserved

The value read from this bit is always 0. Do not set this bit.

DTGL

Data Toggle (Read-only)

This bit is set by hardware when a valid DATA0 packet is received and

accepted.

This bit is cleared by hardware when a valid DATA1 packet is received and

accepted.

EPDIR

Endpoint Direction

Set this bit to configure IN direction for Bulk, Interrupt and Isochronous

endpoints.

Clear this bit to configure OUT direction for Bulk, Interrupt and Isochronous

endpoints.

This bit has no effect for Control endpoints.

1-0

EPTYPE[1:0]

Endpoint Type

Set this field according to the endpoint configuration (Endpoint 0 will always be

configured as control):

00Control endpoint

01Isochronous endpoint

10Bulk endpoint

11Interrupt endpoint

AT89C5131A-RDTIL Datenblatt(PDF) 140 Page - ATMEL Corporation

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