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DAC-12100

12-Bit, 100MHz, Low-Power D/A Converters

26 Jun 2015 MDA_DAC-12100.B03 Page 3 of 7

TECHNICAL NOTES

Footnotes:

➀ Best fit straight line.

➂ Clock frequency range is from DC to the guaranteed minimum conversion rate.

➃ Dynamic Range must be limited to a 1V swing within the compliance range.

Clock Termination

The internal 12-bit register is updated on the rising edge of the Data Clock

(pin 26). To minimize reflections and noise at high clock speeds proper

termination techniques should be used. In the PCB layout the clock runs

should be kept as short as possible and have minimal loading. The PCB

CLOCK pin as possible, see Figure 2. The rise, fall and propagation delay

times will be effected by the shunt termination resistor.

Digital Inputs

The DAC-12100 is TTL/CMOS compatible. Data is latched by a Master

register.

Outputs

The sum of the two currents is always equal to the full scale current minus

one LSB. See Table 1. The output can be converted to a voltage through a

load resistor, typically 50 Ohms. Both current outputs should have the same

load resistance value. See Figure 2. The output voltage generated is:

where 227 Ohms is the nominal DAC output resistance.

Table 1. Input Coding Table

0 TO +70°C

–55 TO +125°C

INTERNAL REFERENCE/AMPLIFIER

MIN.

TYP.

MAX.

MIN.

TYP.

MAX.

UNITS

Reference Voltage, VREF

–1.27

–1.23

–1.17

–1.27

–1.23

–1.17

Volts

Reference Voltage Drift

—

50

100

—

175

100

μV/°C

Reference Current Sink/Source Capability

–125

+50

–125

—

+50

μA

Reference Load Regulation

(IREF = 0 to –125μA)

—

50

—

—

50

—

μV

Reference Input (CTRL IN) Impedance

—

12

—

10

12

—

kOhms

Reference Input (CTRL IN)

Multiplying Bandwidth

(100mV sine wave, to -3dB loss at IOUT)

50

200

—

50

200

—

MHz

Input Impedance at REF OUT

3

1.4

—

3

1.4

—

kOhms

Amplifier Large Signal Bandwidth

(4V p-p sine wave input, to slew rate limit)

1

3

—

1

3

—

MHz

Amplifier Small Signal Bandwidth

(1V p-p sine wave input, to –3dB loss)

4

10

—

4

10

—

MHz

POWER REQUIREMENTS

Power Supply Ranges

+5V Supply

+4.75

—

+5.25

+4.75

—

+5.25

Volts

–5.2V Supplies

–4.94

—

–5.46

–4.94

—

–5.46

Volts

Power Supply Currents

+5V Supply

—

13

20

—

13

20

mA

–5.2V Digital Supply

—

70

85

—

70

95

mA

–5.2V Analog Supply

—

42

50

—

42

50

mA

Power Dissipation

—

650

800

—

650

800

mW

Power Supply Rejection (±5% variation)

—

5

10

—

5

10

μA/V

INPUT CODE

MSB

LSB

Iout (mA)

Iout (mA)

1111 1111 1111

–20.48

0

1000 0000 0000

–10.24

–10.24

0000 0000 0000

0

–20.48