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STR720 Datenblatt(PDF) 389 Page - STMicroelectronics

Teilenummer STR720
Bauteilbeschribung  ARM720T 16/32-BIT MCU WITH 16K RAM, USB, CAN, 3 TIMERS, ADC, 6 COMMUNICATIONS INTERFACES
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
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STR720 - ELECTRICAL CHARACTERISTICS
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28.11 S-D ADC characteristics
The static electrical characteristics of A/D converter are reported in Table 105. In the
subsequent sections, parameters related to input circuit and A/D converter performance are
listed.
1.
VDD(all) = 1.80 V ± 10%, VDD3(all) = 3.30 V ± 10%, TA = -40 / +85 °C unless otherwise specified.
2.
As long as CLK pad is used to provide system clock, either directly or thorugh PLL, a consumption will be observed
on AVDD pad, due to CLK pad reference current generators. Only when STR720 is put in SLOW mode (32 kHz) or
STOP mode (no clock) CLK pad reference current generators can be switched off and the minimum AVDD consump-
tion can be achieved.
3.
VAIN may exceed AGND or AVDD up to the absolute maximum ratings. However, the conversion result in these cases
will be meaningless. Data based on design guidelines, not tested in production.
28.11.1 ADC analog input pins
To improve the accuracy of the A/D converter, the first recommendation is to properly connect
decoupling capacitors on AVDD pin, so to reduce as much as possible the amount of noise
introduced through the analog supply voltage pin. Subsequently it is definitively necessary for
analog input pins to have low AC impedance. Connecting a capacitor with good high
frequency characteristics at the input pin of the device, can be effective: the capacitor should
be as large as possible, ideally infinite. This capacitor contributes to attenuate noise present
on the input pin; moreover, it sources charge during the sampling phase, when the analog
signal source is a high-impedance source.
On each analog input pin an anti-aliasing filter is required so to avoid that components beyond
the sampling frequency are folded back into the actual signal bandwidth. Due to the structure
of Sigma-Delta ADC, these components cannot be removed by software post-processing of
the acquired samples, so it is of fundamental importance to remove them before feeding the
signal to the analog input pin. An anti-aliasing filter can be obtained in general by using a
series resistance with a capacitor on the input pin (simple RC Filter), though other more
complex solutions with better band rejection characteristics can be used. The RC filtering may
be limited according to the value of source impedance of the transducer or circuit supplying
the analog signal to be measured.
Table 105. ADC static characteristics
Symbol
Parameter
Test Conditions(1)
Value
Unit
Min.
Typ
Max
AVDD
Analog supply voltage for ADC With reference to AVSS pin
3.0
3.30
3.6
V
AIDD
AVDD operating mode current
-
1.8
-
mA
AIDD_O
AVDD off current
ADC off but CLK pad active(2)
--
-
mA
AIDD_S
AVDD standby/stop current
ADC off and CLK pad not
used(2)
--
1
µA
VAIN
Analog input voltage
See note (3)
0
-
2.5
V
IALEAK
Analog input leakage current
-
-
200
nA



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