STR720 datasheet(395/401 Pages) STMICROELECTRONICS

395 / 401 page

STR720 - ELECTRICAL CHARACTERISTICS

395/401

See Figure 83 and Figure 84 for a definition of these parameters.

VDD(all) = 1.80 V ± 10%, VDD3(all) = 3.30 V ± 10%, TA = -40 / +85 °C unless otherwise specified.

Data based on design guidelines, not tested in production.

TC is CPU clock period expressed in ns. For example if CPU clock is set to run at 50 MHz, TC =20 ns.

Actual duration is configurable. See Chapter 11: EXTERNAL MEMORY INTERFACE (EMI) on page 115.

Table 109. EMI Write cycle timing characteristics

Symbol

Parameter(1)

Test Conditions(2), (3)

Value(4)

Unit

Min

Typ

Max

tWPC1

Write pulse time for ECSx in 8/

16-bit word access

Depends on EMI configura-

tion.(5)

2TC - x

9TC + x

tWPW1

Write pulse time for EWEx in 8/

16-bit word access

Depends on EMI configura-

tion.(5)

TC - x

8TC + x

tWPC2

Write pulse time for ECSx in

32-bit word access

Depends on EMI configura-

tion.(5)

4TC - x

18TC + x

tWDH

Write Data Hold Time

TC - x

TC +x

tWASC

Write address setup time to ECS

TC - x

TC +x

tWASW

Write address setup time to

EWEx

TC - x

TC +x

tWASD

Write address setup time to EDA-

TC - x

TC +x

tWWT

WEn Turnaround Time

TC - x

TC +x

tWAH

Write Address Hold Time

Figure 83. EMI Write cycle timing (8-bit or 16-bit word)

ECSx

ERD

EADD[21:0]

Address

wait cycle

tWASC

tWAH

Note: this diagram shows the timing of 3 wait-state cycle write access.

tWPW1

EWEx

EDATA[15:0]

(Output)

Data Output

tWDH

tWASW

tWASD

tWPC1

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