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STM32WLE4JC Datenblatt(PDF) 118 Page - STMicroelectronics

Teilenummer STM32WLE4JC
Bauteilbeschribung  Multiprotocol LPWAN 32-bit Arm® Cortex®-M4 MCUs, LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
PDF  145 Pages
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
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STM32WLE4JC Datenblatt(HTML) 118 Page - STMicroelectronics

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Electrical characteristics
STM32WLE5/E4xx
118/145
DS13105 Rev 8
Figure 22. ADC accuracy characteristics
THD
Total
harmonic
distortion
VDDA = VREF+ = 3 V, fADC = 35 MHz, fs ≤ 2.5 Msps, TA = 25 °C
-
-74
-73
dB
2 V < VDDA, VREF+ < 3.6 V,
fADC = 35 MHz, fs ≤ 2.5 Msps, TA = entire range
--74
-70
1.62 V < VDDA = VREF+ < 3.6 V, TA = entire range
Range 1: fADC = 35 MHz, fs ≤ 2.2 Msps
Range 2: fADC = 16 MHz, fs ≤ 1.1 Msps
--74
-70
1. Based on characterization results, not tested in production.
2. ADC DC accuracy values are measured after internal calibration.
3. Injecting negative current on any analog input pin significantly reduces the accuracy of A-to-D conversion of signal on
another analog input. It is recommended to add a Schottky diode (pin to ground) to analog pins susceptible to receive
negative current.
4. I/O analog switch voltage booster enabled (BOOSTEN = 1 in the SYSCFG_CFGR1) when VDDA < 2.4 V and disabled when
VDDA ≥ 2.4 V.
Table 79. ADC accuracy(1)(2)(3) (continued)
Symbol
Parameter
Conditions(4)
Min Typ Max Unit
MSv19880V3
(1) Example of an actual transfer curve
(2) Ideal transfer curve
(3) End point correlation line
4095
4094
4093
7
6
5
4
3
2
1
0
2
345
6
1
7
4093 4094
4095
ED
1 LSB ideal
(1)
(3)
(2)
EL
ET
EG
EO
Code
(VAIN / VREF+)*4095
ET total unadjusted error: maximum deviation
between the actual and ideal transfer curves.
EG gain error: deviation between the last ideal
transition and the last actual one.
ED differential linearity error: maximum deviation
between actual steps and the ideal ones.
EL integral linearity error: maximum deviation between
any actual transition and the end point correlation line.
EO offset error: maximum deviation between the
first actual transition and the first ideal one.



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