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PCIMX6DP7AVT2AB Datenblatt(PDF) 138 Page - NXP Semiconductors |
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PCIMX6DP7AVT2AB Datenblatt(HTML) 138 Page - NXP Semiconductors |
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138 / 166 page ![]() i.MX 6DualPlus/6QuadPlus Automotive Applications Processors, Rev. 3, 11/2018 138 NXP Semiconductors Boot Mode Configuration 5 Boot Mode Configuration This section provides information on boot mode configuration pins allocation and boot devices interfaces allocation. 5.1 Boot Mode Configuration Pins Table 93 provides boot options, functionality, fuse values, and associated pins. Several input pins are also sampled at reset and can be used to override fuse values, depending on the value of BT_FUSE_SEL fuse. The boot option pins are in effect when BT_FUSE_SEL fuse is ‘0’ (cleared, which is the case for an unblown fuse). For detailed boot mode options configured by the boot mode pins, see the System Boot chapter of the i.MX 6DualPlus/6QuadPlus reference manual (IMX6DQPRM). Table 93. Fuses and Associated Pins Used for Boot Pin Direction at Reset eFuse Name Boot Mode Selection BOOT_MODE1 Input Boot Mode Selection BOOT_MODE0 Input Boot Mode Selection Boot Options1 EIM_DA0 Input BOOT_CFG1[0] EIM_DA1 Input BOOT_CFG1[1] EIM_DA2 Input BOOT_CFG1[2] EIM_DA3 Input BOOT_CFG1[3] EIM_DA4 Input BOOT_CFG1[4] EIM_DA5 Input BOOT_CFG1[5] EIM_DA6 Input BOOT_CFG1[6] EIM_DA7 Input BOOT_CFG1[7] EIM_DA8 Input BOOT_CFG2[0] EIM_DA9 Input BOOT_CFG2[1] EIM_DA10 Input BOOT_CFG2[2] EIM_DA11 Input BOOT_CFG2[3] EIM_DA12 Input BOOT_CFG2[4] EIM_DA13 Input BOOT_CFG2[5] EIM_DA14 Input BOOT_CFG2[6] EIM_DA15 Input BOOT_CFG2[7] EIM_A16 Input BOOT_CFG3[0] EIM_A17 Input BOOT_CFG3[1] EIM_A18 Input BOOT_CFG3[2] |
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