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PCIMX6DP4AVT2AB Datenblatt(PDF) 116 Page - NXP Semiconductors |
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PCIMX6DP4AVT2AB Datenblatt(HTML) 116 Page - NXP Semiconductors |
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116 / 166 page ![]() i.MX 6DualPlus/6QuadPlus Automotive Applications Processors, Rev. 3, 11/2018 116 NXP Semiconductors Electrical Characteristics 4.12.13.9 DATA and FLAG Signal Timing Figure 80. DATA and FLAG Signal Timing 4.12.14 MediaLB (MLB) Characteristics 4.12.14.1 MediaLB (MLB) DC Characteristics Table 71 lists the MediaLB 3-pin interface electrical characteristics. Table 72 lists the MediaLB 6-pin interface electrical characteristics. Table 71. MediaLB 3-Pin Interface Electrical DC Specifications Parameter Symbol Test Conditions Min Max Unit Maximum input voltage — — — 3.6 V Low level input threshold VIL —— 0.7 V High level input threshold VIH See Note1 1 Higher V IH thresholds can be used; however, the risks associated with less noise margin in the system must be evaluated and assumed by the customer. 1.8 — V Low level output threshold VOL IOL = 6 mA — 0.4 V High level output threshold VOH IOH = –6 mA 2.0 — V Input leakage current IL 0 < Vin < VDD — ±10 μA Table 72. MediaLB 6-Pin Interface Electrical DC Specifications Parameter Symbol Test Conditions Min Max Unit Driver Characteristics Differential output voltage (steady-state): I VO+ - VO- I VOD See Note1 300 500 mV Difference in differential output voltage between (high/low) steady-states: I VOD, high - VOD, low I ΔVOD — -50 50 mV DATA (TX) FLAG (TX) DATA (RX) FLAG (RX) 50% 50% 50% 50% 50% 50% 80% 80% 20% 20% 20% 20% 80% 80% t EdgeSepTx t TxToRxSkew t EdgeSepRx t Bit t Rise t Fall Note1 Note1 Note2 Note2 |
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