SCIMX6DP4AVT2AB datasheet(158/166 Pages) NXP

158 / 166 page

i.MX 6DualPlus/6QuadPlus Automotive Applications Processors, Rev. 3, 11/2018

158

NXP Semiconductors

Package Information and Contact Assignments

6.2.4

Signals with Different Reset States

For most of the signals, the state during reset is same as the state after reset, given in Out of Reset Condition

column of Table 96, “21 x 21 mm Functional Contact Assignments”. However, there are few signals for

which the state during reset is different from the state after reset. These signals along with their state during

reset are given in Table 97.

2 Variance of the pull-up and pull-down strengths are shown in the tables as follows:

• Table 22, “GPIO I/O DC Parameters,” on page 40.

• Table 24, “LPDDR2 I/O DC Electrical Parameters,” on page 42.

• Table 25, “DDR3/DDR3L I/O DC Electrical Parameters,” on page 42.

3 ENET_REF_CLK is used as a clock source for MII and RGMII modes only. RMII mode uses either GPIO_16 or RGMII_TX_CTL

as a clock source. For more information on these clocks, see your specific device reference manual and the Hardware

Development Guide for i.MX 6Quad, 6Dual, 6DualLite, 6Solo Families of Applications Processors (IMX6DQ6SDLHDG).

Table 97. Signals with Differing Before Reset and After Reset States

Ball Name

Before Reset State

Input/Output

Value

EIM_A16

Input

PD (100K)

EIM_A17

Input

PD (100K)

EIM_A18

Input

PD (100K)

EIM_A19

Input

PD (100K)

EIM_A20

Input

PD (100K)

EIM_A21

Input

PD (100K)

EIM_A22

Input

PD (100K)

EIM_A23

Input

PD (100K)

EIM_A24

Input

PD (100K)

EIM_A25

Input

PD (100K)

EIM_DA0

Input

PD (100K)

EIM_DA1

Input

PD (100K)

EIM_DA2

Input

PD (100K)

EIM_DA3

Input

PD (100K)

EIM_DA4

Input

PD (100K)

EIM_DA5

Input

PD (100K)

EIM_DA6

Input

PD (100K)

EIM_DA7

Input

PD (100K)

EIM_DA8

Input

PD (100K)

EIM_DA9

Input

PD (100K)

EIM_DA10

Input

PD (100K)

EIM_DA11

Input

PD (100K)

EIM_DA12

Input

PD (100K)

EIM_DA13

Input

PD (100K)

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