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PCIMX6QP4AVT2AB Datenblatt(PDF) 127 Page - NXP Semiconductors |
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PCIMX6QP4AVT2AB Datenblatt(HTML) 127 Page - NXP Semiconductors |
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127 / 160 page ![]() Electrical Characteristics i.MX 6DualPlus/6QuadPlus Applications Processors Industrial Products, Rev. 3, 11/2018 NXP Semiconductors 127 4.12.20 UART I/O Configuration and Timing Parameters 4.12.20.1 UART RS-232 I/O Configuration in Different Modes The i.MX 6DualPlus/6QuadPlus UART interfaces can serve both as DTE or DCE device. This can be configured by the DCEDTE control bit (default 0 – DCE mode). Table 77 shows the UART I/O configuration based on the enabled mode. Table 77. UART I/O Configuration vs. Mode Port DTE Mode DCE Mode Direction Description Direction Description UARTx_RTS_B Output RTS from DTE to DCE Input RTS from DTE to DCE UARTx_CTS_B Input CTS from DCE to DTE Output CTS from DCE to DTE UARTx_DTR_B Output DTR from DTE to DCE Input DTR from DTE to DCE UARTx_DSR_B Input DSR from DCE to DTE Output DSR from DCE to DTE UARTx_DCD_B Input DCD from DCE to DTE Output DCD from DCE to DTE UARTx_RI_B Input RING from DCE to DTE Output RING from DCE to DTE UARTx_TX_DATA Input Serial data from DCE to DTE Output Serial data from DCE to DTE UARTx_RX_DATA Output Serial data from DTE to DCE Input Serial data from DTE to DCE |
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