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STM32H757AI Datenblatt(PDF) 168 Page - STMicroelectronics

Teilenummer STM32H757AI
Bauteilbeschribung  Dual 32-bit Arm® Cortex®-M7 up to 480MHz and -M4 MCUs, 2MB Flash, 1MB RAM, 46 com. and analog interfaces, SMPS, DSI, crypto
PDF  251 Pages
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
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STM32H757AI Datenblatt(HTML) 168 Page - STMicroelectronics

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Electrical characteristics
STM32H757xI
168/251
DS12931 Rev 1
Table 82. Asynchronous multiplexed PSRAM/NOR read timings(1)
1. Guaranteed by characterization results.
Symbol
Parameter
Min
Max
Unit
tw(NE)
FMC_NE low time
4Tfmc_ker_ck –1
4Tfmc_ker_ck +1
ns
tv(NOE_NE)
FMC_NEx low to FMC_NOE low
2Tfmc_ker_ck
2Tfmc_ker_ck
+0.5
ttw(NOE)
FMC_NOE low time
Tfmc_ker_ck –1
Tfmc_ker_ck +1
th(NE_NOE)
FMC_NOE high to FMC_NE high hold
time
0
-
tv(A_NE)
FMC_NEx low to FMC_A valid
-
0.5
tv(NADV_NE)
FMC_NEx low to FMC_NADV low
0
0.5
tw(NADV)
FMC_NADV low time
Tfmc_ker_ck –0.5
Tfmc_ker_ck +1
th(AD_NADV)
FMC_AD(address) valid hold time
after FMC_NADV high)
Tfmc_ker_ck +0.5
-
th(A_NOE)
Address hold time after FMC_NOE
high
Tfmc_ker_ck –0.5
-
tsu(Data_NE)
Data to FMC_NEx high setup time
11
-
tsu(Data_NOE)
Data to FMC_NOE high setup time
11
-
th(Data_NE)
Data hold time after FMC_NEx high
0
-
th(Data_NOE)
Data hold time after FMC_NOE high
0
-
Table 83. Asynchronous multiplexed PSRAM/NOR read-NWAIT timings(1)(2)
1. Guaranteed by characterization results.
2. NWAIT pulse width is equal to 1 AHB cycle.
Symbol
Parameter
Min
Max
Unit
tw(NE)
FMC_NE low time
8Tfmc_ker_ck –1
8Tfmc_ker_ck
ns
tw(NOE)
FMC_NWE low time
5Tfmc_ker_ck –1.5
5Tfmc_ker_ck +0.5
tsu(NWAIT_NE)
FMC_NWAIT valid before
FMC_NEx high
4Tfmc_ker_ck +11
-
th(NE_NWAIT)
FMC_NEx hold time after
FMC_NWAIT invalid
3Tfmc_ker_ck +11.5
-



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