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DRA821U2...ALM Datenblatt(PDF) 114 Page - Texas Instruments

Teilenummer DRA821U2...ALM
Bauteilbeschribung  DRA821 Jacinto™ Processors
PDF  252 Pages
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DRA821U2...ALM Datenblatt(HTML) 114 Page - Texas Instruments

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7.9.2.4 Independent MCU and Main Domains Power- Up Sequencing
Independent MCU and Main voltage domains enable an SoC’s MCU and Main processor sub-systems to
operate independently. There are 2 reasons an SoC’s PDN design may need to support independent MCU and
Main processor functionality. First is to provide flexibility to enable SoC low power modes that can significant
reduce SoC power dissipation when processor operations are not needed. Second is to enable robustness to
gain freedom from interference (FFI) of a single fault impacting both MCU and Main processor sub-systems
which is especially beneficial if using the SoC’s MCU as the system safety monitoring processor. The number
of additional PDN power rails needed is dependent upon number of different MCU IO signaling voltage levels.
If only 1.8V IO signaling is used, the only 2 additional power rails could be required. If both 1.8 and 3.3V IO
signaling is desired, then 4 additional power rails could be needed.
DRA821U-Q1
SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022
www.ti.com
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