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KSZ9563R Datenblatt(PDF) 175 Page - Microchip Technology

Teilenummer KSZ9563R
Bauteilbeschribung  3-Port Gigabit Ethernet Switch with RGMII/MII/RMII Interface and IEEE 1588v2
PDF  226 Pages
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Hersteller  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

KSZ9563R Datenblatt(HTML) 175 Page - Microchip Technology

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 2017-2018 Microchip Technology Inc.
DS00002419D-page 175
KSZ9563R
5.2.10
PORT N: PORT SWITCH ADDRESS LOOKUP CONTROL REGISTERS (0xNB00 - 0xNBFF)
5.2.10.1
Port Control 2 Register
Address:
0xNB00
Port N: 1-3
Size:
8 bits
Bits
Description
Type
Default
7
Null VID Lookup Enable
How to handle tagged packets with VID = 0.
1 = Non-standard operation. VLAN Table lookup using VID = 0.
0 = Standard operation. VLAN Table lookup using the port default VID (Port
Default Tag 0 Register and Port Default Tag 1 Register)
R/W
0b
6
Ingress VLAN Filtering
1 = Discard packets whose VID port membership in the VLAN Table does
not include the ingress port
0 = No ingress filtering
R/W
0b
5
Discard Non-PVID Packet
1 = Discard packets whose VID does not match the ingress port default VID
0 = Do not compare VID to the port default VID
R/W
0b
4
MAC Based 802.1X Enable
1 = Enable MAC based 802.1X authentication in lookup engine
0 = Only use ACL (if enabled) to perform MAC based authentication
R/W
0b
3
Self-Address Filtering – Port Enable
The source address of received packets is compared to the MAC address in
the Switch MAC Address 0 Register through Switch MAC Address 5
Register, and the packet is dropped if there is a match.
Both this port enable bit and the global enable bit in the Switch Lookup
Engine Control 1 Register must be set to enable self-address filtering.
1 = Enable self-address filtering for this port.
0 = Disable self-address filtering for this port.
R/W
0b
2
RESERVED
RO
0b
1
RESERVED
R/W
0b
0
RESERVED
RO
0b



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