KSZ9567R datasheet(219/233 Pages) MICROCHIP

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DS00002329E-page 219

KSZ9567R

7.2

Magnetics Connection and Selection Guidelines

A 1:1 isolation transformer is required at the line interface. For designs exceeding FCC requirements, utilize one with

integrated common-mode chokes. An optional auto-transformer stage following the chokes provides additional com-

mon-mode noise and signal attenuation.

The KSZ9567R PHY port design incorporates voltage-mode transmit drivers and on-chip terminations. With the voltage-

mode implementation, the transmit drivers supply the common-mode voltages to the four differential pairs. Therefore,

the four transformer center tap pins on the KSZ9567R chip side should not be connected to any power supply source

on the board; rather, the center tap pins should be separated from one another and connected through separate 0.1µF

common-mode capacitors to ground. Separation is required because the common-mode voltage could be different

between the differential pairs, depending on the connected speed mode.

Figure 7-3 details a typical magnetic interface circuit for the KSZ9567R PHY port.

Table 7-1 provides a list of recommended magnetic characteristics.

FIGURE 7-3:

TYPICAL MAGNETIC INTERFACE CIRCUIT

TABLE 7-1:

MAGNETICS SELECTION CRITERIA

Parameter

Value

Test Condition

Turns ratio

1 CT : 1 CT

Open-circuit inductance (min.)

350µH

100mV, 100KHz, 8mA

Insertion loss (typ.)

1.0dB

100KHz to 100MHz

HIPOT (min.)

1500vrms

4X 75

Ohm

1000 pF / 2kV

CHASSIS GROUND

(4X 0.1uF)

TXRXxP_A

TXRXxM_A

TXRXxP_B

TXRXxM_B

TXRXxP_C

TXRXxM_C

TXRXxP_D

TXRXxM_D

SIGNAL GROUND

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