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STM32H523VCU6TR Datenblatt(PDF) 131 Page - STMicroelectronics

Teilenummer STM32H523VCU6TR
Bauteilbeschribung  Arm Cortex -M33 32-bit MCUTrustZone FPU, 375 DMIPS Arm Cortex -M33 32-bit MCUTrustZone FPU, 375 DMIPS
PDF  228 Pages
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32H523VCU6TR Datenblatt(HTML) 131 Page - STMicroelectronics

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DS14540 Rev 1
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STM32H523xx
Electrical characteristics
197
Table 58. Output voltage characteristics for FT_c I/Os (PB13/PB14)
Symbol
Parameter
Conditions(1)
1. The IIO current sourced or sunk by the device must always respect the absolute maximum rating specified
in Table 16, and the sum of the currents sourced or sunk by all the I/Os (I/O ports and control pins) must
always respect the absolute maximum ratings ΣIIO.
Min
Max
Unit
VOL
Output low level voltage
CMOS port(2), IIO = 2 mA
2.7 V ≤ VDD ≤ 3.6 V
2. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.
-0.4
V
VOH
Output high level voltage
CMOS port(2), IIO = -2 mA
2.7 V ≤ VDD ≤ 3.6 V
VDD− 0.4
-
VOL(3)
3. Specified by design - Not tested in production.
Output low level voltage
TTL port(2), IIO = 2 mA
2.7 V ≤ VDD ≤ 3.6 V
-0.4
VOH(3) Output high level voltage
TTL port(2), IIO = -2 mA
2.7 V ≤ VDD ≤ 3.6 V
2.4
-
VOL(3)
Output low level voltage
IIO = 1 mA
2.7 V ≤ VDD ≤ 3.6 V
-0.4
VOH(3) Output high level voltage
IIO = -1 mA
2.7 V ≤ VDD ≤ 3.6 V
VDD - 0.4
-
VOL(3)
Output low level voltage
IIO = 0.1 mA
1.71 V ≤ VDD ≤ 3.6 V
-0.4
VOH (3) Output high level voltage
IIO = -0.1 mA
1.71 V ≤ VDD < 3.6 V
VDD - 0.4
-
Table 59. Output voltage characteristics for PC13(1)
1. The IIO current sourced or sunk by the device must always respect the absolute maximum rating specified
in Table 16, and the sum of the currents sourced or sunk by all the I/Os (I/O ports and control pins) must
always respect the absolute maximum ratings ΣIIO.
Symbol
Parameter
Conditions(3)
Min
Max
Unit
VOL
Output low level voltage
CMOS port(2), IIO = 3 mA
2.7 V ≤ VDD ≤ 3.6 V
2. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.
-0.4
V
VOH
Output high level voltage
CMOS port(2), IIO = -3 mA
2.7 V ≤ VDD ≤ 3.6 V
VDD - 0.4
-
VOL(3)
3. Specified by design - Not tested in production.
Output low level voltage
TTL port(2), IIO = 3 mA
2.7 V ≤ VDD ≤ 3.6 V
-0.4
VOH(3)
Output high level voltage
TTL port(2), IIO = -3 mA
2.7 V ≤ VDD ≤ 3.6 V
2.4
-
VOL(3)
Output low level voltage
IIO = 1.5 mA
1.71 V ≤ VDD ≤ 3.6 V
-0.4
VOH(3)
Output high level voltage
IIO = −1.5 mA
1.71 V ≤ VDD ≤ 3.6 V
VDD - 0.4
-



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