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STM32F427NET6TR Datenblatt(PDF) 225 Page - STMicroelectronics |
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STM32F427NET6TR Datenblatt(HTML) 225 Page - STMicroelectronics |
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225 / 231 page ![]() DocID024030 Rev 6 225/231 STM32F427xx STM32F429xx Application block diagrams 225 Figure 109. RMII with a 25 MHz crystal and PHY with PLL 1. fHCLK must be greater than 25 MHz. The 25 MHz (PHY_CLK) must be derived directly from the HSE oscillator, before the PLL block. |
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