STM32F427NET7TR datasheet(226/231 Pages) STMICROELECTRONICS

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Revision history

STM32F427xx STM32F429xx

226/231

DocID024030 Rev 6

Revision history

Table 124. Document revision history

Date

Revision

Changes

19-Mar-2013

Initial release.

10-Sep-2013

Added STM32F429xx part numbers and related informations.

STM32F427xx part numbers:

Replaced FSMC by FMC added Chrom-ART Accelerator and SAI

interface.

Increased core, timer, GPIOs, SPI maximum frequencies

Updated Figure 8.Updated Figure 9.

Removed note in Section ·: Standby mode.

Updated Figure 18.

Updated Table 10: STM32F427xx and STM32F429xx pin and ball

definitions and Table 12: STM32F427xx and STM32F429xx alternate

function mapping..

Modified Figure 19: Memory map.

Updated Table 17: General operating conditions, Table 18: Limitations

depending on the operating power supply range. Removed note 1 in

Table 22: reset and power control block characteristics. Added

Table 23: Over-drive switching characteristics.

Updated Section : Typical and maximum current consumption,

Table 34: Switching output I/O current consumption, Table 35:

Peripheral current consumption and Section : On-chip peripheral

current consumption.

Updated Table 36: Low-power mode wakeup timings.

Modified Section : High-speed external user clock generated from an

external source, Section : Low-speed external user clock generated

from an external source, and Section 6.3.10: Internal clock source

characteristics.

Updated Table 43: Main PLL characteristics and Table 45: PLLISAI

(audio and LCD-TFT PLL) characteristics.

Updated Table 52: EMI characteristics.

Updated Table 57: Output voltage characteristics and Table 58: I/O AC

characteristics.

Updated Table 60: TIMx characteristics, Table 61: I2C characteristics,

Table 62: SPI dynamic characteristics, Section : SAI characteristics.

Updated Table 102: SDRAM read timings and Table 104: SDRAM write

timings.

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