H8SXSLASH1663R datasheet(524/1504 Pages) RENESAS

524 / 1504 page

Section 11 EXDMA Controller (EXDMAC)

Rev. 2.00 Sep. 24, 2008 Page 492 of 1468

REJ09B0412-0200

(2)

Burst Mode

In burst mode, once the EXDMAC acquires the bus mastership, it continues transferring data,

without releasing the bus mastership, until the transfer end condition is satisfied. In burst mode,

once transfer is started it is not interrupted even if there is a transfer request for another channel

with higher priority. When the burst mode channel finishes its transfer, it releases the bus

mastership in the next cycle in the same way as in cycle steal mode. However, when the EBCCS

bit in BCR2 of the bus controller is set to 1, the EXDMAC can temporarily release the bus

mastership for another bus master when an external access request is generated from another bus

master.

In block transfer mode and cluster transfer mode, the setting of burst mode is invalid (one-block or

one-cluster transfer is processed in the same way as in burst mode). The EXDMAC always

operates in cycle steal mode.

When the DTE bit is cleared to 0 in EDMDR, EXDMA transfer is halted. However, EXDMA

transfer is executed for all transfer requests generated within the EXDMAC until the DTE bit is

cleared to 0. If a transfer size error interrupt, a repeat size end interrupt, or extended repeat area

overflow interrupt is generated, the DTE bit is cleared to 0 and transfer is terminated.

Figure 11.14 shows an example of the timing in burst mode.

CPU

EXDMAC

Bus cycle

CPU cycle not generated

Figure 11.14 Example of Timing in Burst Mode

11.5.5

Extended Repeat Area Function

The EXDMAC has a function for designating an extended repeat area for source addresses and/or

destination addresses. When an extended repeat area is designated, the address register values

repeat within the range specified as the extended repeat area. Normally, when a ring buffer is

involved in a transfer, an operation is required to restore the address register value to the buffer

start address each time the address register value becomes the last address in the buffer (i.e. when

ring buffer address overflow occurs). However, if the extended repeat area function is used, the

operation that restores the address register value to the buffer start address is processed

automatically within the EXDMAC.

The extended repeat area function can be set independently for the source address register

(EDSAR) and the destination address register (EDDAR).

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