| Datenblatt-Suchmaschine für elektronische Bauteile |
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H8SX/1663R Datenblatt(PDF) 858 Page - Renesas Technology Corp |
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H8SX/1663R Datenblatt(HTML) 858 Page - Renesas Technology Corp |
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858 / 1504 page ![]() Section 16 8-Bit Timers (TMR) Rev. 2.00 Sep. 24, 2008 Page 826 of 1468 REJ09B0412-0200 Table 16.5 Clock Input to TCNT and Count Condition (Unit 3) TCR TCCR Channel Bit 2 CKS2 Bit 1 CKS1 Bit 0 CKS0 Bit 1 ICKS1 Bit 0 ICKS0 Description 0 0 0 Clock input prohibited 0 0 Uses internal clock. Counts at rising edge of P φ/8. 0 1 Uses internal clock. Counts at rising edge of P φ/2. 1 0 Uses internal clock. Counts at falling edge of P φ/8. 0 0 1 1 1 Uses internal clock. Counts at falling edge of P φ/2. 0 0 Uses internal clock. Counts at rising edge of P φ/64. 0 1 Uses internal clock. Counts at rising edge of P φ/32. 1 0 Uses internal clock. Counts at falling edge of P φ/64. 0 1 0 1 1 Uses internal clock. Counts at falling edge of P φ/32. 0 0 Uses internal clock. Counts at rising edge of P φ/8192. 0 1 Uses internal clock. Counts at rising edge of P φ/1024. 1 0 Uses internal clock. Counts at rising edge of P φ. 0 1 1 1 1 Uses internal clock. Counts at falling edge of P φ/1024. TMR_6 1 0 0 Counts at TCNT_7 overflow signal*. 0 0 0 Clock input prohibited 0 0 Uses internal clock. Counts at rising edge of P φ/8. 0 1 Uses internal clock. Counts at rising edge of P φ/2. 1 0 Uses internal clock. Counts at falling edge of P φ/8. 0 0 1 1 1 Uses internal clock. Counts at falling edge of P φ/2. 0 0 Uses internal clock. Counts at rising edge of P φ/64. 0 1 Uses internal clock. Counts at rising edge of P φ/32. 1 0 Uses internal clock. Counts at falling edge of P φ/64. 0 1 0 1 1 Uses internal clock. Counts at falling edge of P φ/32. 0 0 Uses internal clock. Counts at rising edge of P φ/8192. 0 1 Uses internal clock. Counts at rising edge of P φ/1024. 1 0 Uses internal clock. Counts at rising edge of P φ. 0 1 1 1 1 Uses internal clock. Counts at falling edge of P φ/1024. TMR_7 1 0 0 Counts at TCNT_6 compare match A*. 1 0 1 Setting prohibited 1 1 0 Setting prohibited All 1 1 1 Setting prohibited Note: * If the clock input of channel 6 is the TCNT_7 overflow signal and that of channel 7 is the TCNT_6 compare match signal, no incrementing clock is generated. Do not use this setting. |
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