H8SXSLASH1663R datasheet(1016/1504 Pages) RENESAS

Teilenummer	H8SX/1663R

Bauteilbeschribung	Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

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1016 / 1504 page

Section 20 USB Function Module (USB)

Rev. 2.00 Sep. 24, 2008 Page 984 of 1468

REJ09B0412-0200

20.3.19

Data Status Register (DASTS)

DASTS indicates whether the transmit FIFO buffers contain valid data. A bit is set when data is

written to the corresponding FIFO buffer and the packet enable state is set, and cleared when all

data has been transmitted to the host.

Bit

Bit Name

Initial Value

R/W



EP3 DE

EP2 DE



EP0i DE

Bit

Bit Name

Initial

Value

R/W

Description



Reserved

These bits are always read as 0. The write value

should always be 0.

EP3 DE

EP3 Data Present

This bit is set when the endpoint 3 FIFO buffer

contains valid data.

EP2 DE

EP2 Data Present

This bit is set when the endpoint 2 FIFO buffer

contains valid data.



Reserved

These bits are always read as 0.

EP0i DE

EP0i Data Present

This bit is set when the endpoint 0 FIFO buffer

contains valid data.

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