H8SXSLASH1663R datasheet(129/1504 Pages) RENESAS

Teilenummer	H8SX/1663R

Bauteilbeschribung	Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

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Section 4 Resets

Rev. 2.00 Sep. 24, 2008 Page 97 of 1468

REJ09B0412-0200

Note that some registers are not initialized by any of the resets. The following describes the CPU

internal registers.

The PC, one of the CPU internal registers, is initialized by loading the start address from vector

addresses with the reset exception handling. At this time, the T bit in EXR is cleared to 0 and the I

bits in EXR and CCR are set to 1. The general registers, MAC, and other bits in CCR are not

initialized.

The initial value of the SP (ER7) is undefined. The SP should be initialized using the MOV.L

instruction immediately after a reset. For details, see section 2, CPU. For other registers that are

not initialized by a reset, see register descriptions in each section.

When a reset is canceled, the reset exception handling is started. For the reset exception handling,

see section 6.3, Reset.

4.2

Input/Output Pin

Table 4.2 shows the pin related to resets.

Table 4.2

Pin Configuration

Pin Name

Symbol

I/O

Function

Reset

RES

Input

Reset input

H8SX/1663R Datenblatt(PDF) 129 Page - Renesas Technology Corp