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7733 Datenblatt(PDF) 259 Page - Renesas Technology Corp |
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7733 Datenblatt(HTML) 259 Page - Renesas Technology Corp |
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259 / 940 page ![]() SERIAL I/O 7733 Group User’s Manual 8–56 8.4 Clock asynchronous serial I/O (UART) mode 8.4.5 Method of reception Figure 8.4.9 shows an initial setting example for related registers when receiving. Reception is started when the following conditions ( and ) are satisfied. Receive enable state (receive enable bit = “1”). The start bit is detected. ____ ____ By connecting the RTSi pin (receiver side) and CTSi pin (transmitter side), the timing of transmission and that of reception can be matched (UART0, UART1). For details, refer to section “8.4.6 Receive operation.” When using interrupts, settings for enabling interrupts are required. For details, refer to chapter “4. Interrupts.” Figure 8.4.10 shows the processing after reception is completed. |
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