AM79C975VCW datasheet(227/304 Pages) AMD

227 / 304 page

Am79C973/Am79C975

227

P R E L I M INARY

SWITCHING CHARACTERISTICS: BUS INTERFACE

Parameter

Symbol

Parameter Name

Test Condition

Min

Max

Unit

Clock Timing

FCLK

CLK Frequency

MHz

tCYC

CLK Period

@ 1.5 V for 5 V signaling

@ 0.4 VDD for 3.3 V signaling

tHIGH

CLK High Time

@ 2.0 V for 5 V signaling

@ 0.4 VDD for 3.3 signaling

tLOW

CLK Low Time

@ 0.8 V for 5 V signaling

@ 0.3 VDD for 3.3 V signaling

tFALL

CLK Fall Time

over 2 V p-p for 5 V signaling

over 0.4 VDD for 3.3 V signaling

(Note 1)

V/ns

tRISE

CLK Rise Time

over 2 V p-p for 5 V signaling

over 0.4 VDD for 3.3 V signaling

(Note 1)

V/ns

Output and Float Delay Timing

tVAL

AD[31:00], C/BE[3:0], PAR, FRAME,

IRDY, TRDY, STOP, DEVSEL, PERR,

SERR

Valid Delay

tVAL (REQ)

REQ Valid Delay

tON

AD[31:00], C/BE[3:0], PAR, FRAME,

IRDY, TRDY, STOP, DEVSEL Active

Delay

tOFF

AD[31:00], C/BE[3:0], PAR, FRAME,

IRDY, TRDY, STOP, DEVSEL Float

Delay

Setup and Hold Timing

tSU

AD[31:00], C/BE[3:0], PAR, FRAME,

IRDY, TRDY, STOP, DEVSEL, IDSEL

Setup Time

AD[31:00], C/BE[3:0], PAR, FRAME,

IRDY, TRDY, STOP, DEVSEL, IDSEL

Hold Time

tSU (GNT)

GNT Setup Time

tH (GNT)

GNT Hold Time

AM79C975VCW Datenblatt(PDF) 227 Page - Advanced Micro Devices

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