AM79C975VCW datasheet(287/304 Pages) AMD

287 / 304 page

Am79C973/Am79C975

287

P R E L I M INARY

Figure 88. LAPP Timeline

Buffer

Ethernet

Wire

activity:

Ethernet

Controller

activity:

Software

activity:

S10: Driver sets up TX descriptor.

S9: Application processes packet, generates TX packet.

S8: Driver calls application

to tell application that

packethas arrived.

S7: Driver polls descriptor of buffer #3.

S6: Driver copies data from buffer #2 to the application

buffer.

S5: Driver polls descriptor #2.

S4: Driver copies data from buffer #1 to the application

buffer.

S3: Driver writes modified application

pointer to descriptor #3.

S2: Driver call to application to

get application buffer pointer.

S1: Interrupt latency.

S0: Driver is idle.

}

N2:EOM

N0: Packet preamble, SFD

and destination address

are arriving.

{

}

C9: Controller writes descriptor #3.

C8: Controller is performing intermittent

bursts of DMA to fill data buffer #3.

C7: Controller writes descriptor #2.

C6: "Last chance" lookahead to

descriptor #3 (OWN).

C5: Controller is performing intermittent

bursts of DMA to fill data buffer #2

C3: SRP interrupt is

generated.

C2: Controller writes descriptor #1.

C1: Controller is performing intermittent

bursts of DMA to fill data buffer #1.

C0: Lookahead to descriptor #2.

N1: 64th byte of packet

data arrives.

C4: Lookahead to descriptor #3 (OWN).

21510B-B1

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