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TL032A Datenblatt(PDF) 6 Page - Texas Instruments

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Teilenummer TL032A
Bauteilbeschribung  ENHANCED-JFET LOW-POWER LOW-OFFSET
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Hersteller  TI1 [Texas Instruments]
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TL032A Datenblatt(HTML) 6 Page - Texas Instruments

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TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C − FEBRUARY 1997 − REVISED DECEMBER 2001
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
TL031C and TL031AC electrical characteristics at specified free-air temperature
TL031C, TL031AC
PARAMETER
TEST CONDITIONS
TA
VCC± = ±5 V
VCC± = ±15 V
UNIT
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
TL031C
25
°C
0.54
3.5
0.5
1.5
V
Input offset voltage
VO = 0,
V
0
TL031C
Full range
4.5
2.5
mV
VIO
Input offset voltage
VIC = 0,
RS = 50 Ω
TL031AC
25
°C
0.41
2.8
0.34
0.8
mV
RS = 50 Ω
TL031AC
Full range
3.8
1.8
TL031C
25
°C to
71
59
a
Temperature coefficient of
VO = 0,
V
0
TL031C
25 C to
70
°C
7.1
5.9
V/
°C
a
V
IO
Temperature coefficient of
input offset voltage
VIC =0,
RS = 50 Ω
TL031AC
25
°C to
71
59
25
μV/°C
input offset voltage
RS = 50 Ω
TL031AC
25 C to
70
°C
7.1
5.9
25
Input offset voltage
long-term drift
VO = 0,
VIC =0,
RS = 50 Ω
25
°C
0.04
0.04
μV/mo
I
Input offset current
VO = 0, VIC = 0
25
°C
1
100
1
100
pA
IIO
Input offset current
VO = 0, VIC = 0
See Figure 5
70
°C
9
200
12
200
pA
I
Input bias current
VO = 0, VIC = 0
25
°C
2
200
2
200
pA
IIB
Input bias current
VO = 0, VIC = 0
See Figure 5
70
°C
50
400
80
400
pA
V
Common-mode input
25
°C
−1.5
to 4
−3.4
to 5.4
−11.5
to 14
−13.4
to 15.4
V
VICR
Common mode input
voltage range
Full range
−1.5
to 4
−11.5
to 14
V
M
i
iti
k
25
°C
3
4.3
13
14
VOM+
Maximum positive peak
output voltage swing
RL = 10 kΩ
0
°C
3
4.2
13
14
V
VOM+
output voltage swing
RL
10 k
Ω
70
°C
3
4.3
13
14
V
Mi
ti
k
25
°C
−3
−4.2
−12.5
−13.9
VOM−
Maximum negative peak
output voltage swing
RL = 10 kΩ
0
°C
−3
−4.1
−12.5
−13.9
V
VOM−
output voltage swing
RL
10 k
Ω
70
°C
−3
−4.2
−12.5
−14
V
25
°C
4
12
5
14.3
AVD
Large-signal differential
voltage amplification§
RL = 10 kΩ
0
°C
3
11.1
4
13.5
V/mV
AVD
voltage amplification§
RL
10 k
Ω
70
°C
4
13.3
5
15.2
V/mV
ri
Input resistance
25
°C
1012
1012
Ω
ci
Input capacitance
25
°C
5
4
pF
Cd
V
V
i
25
°C
70
87
75
94
CMRR
Common-mode
rejection ratio
VIC = VICRmin,
VO =0 RS =50 Ω
0
°C
70
87
75
94
dB
CMRR
rejection ratio
VO = 0, RS = 50 Ω
70
°C
70
87
75
94
dB
Supply-voltage
25
°C
75
96
75
96
kSVR
Supply-voltage
rejection ratio
VO = 0, RS = 50 Ω
0
°C
75
96
75
96
dB
SVR
rejection ratio
(
ΔVCC±/ΔVIO)
O
,
S
70
°C
75
96
75
96
Full range is 0
°C to 70°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
§ At VCC± = ±5 V, VO = ±2.3 V; at VCC± = ±15 V, VO = ±10 V


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