UCC2974

UCC3974

SLUS485A – JULY 2001 – REVISED NOVEMBER 2001

5

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Terminal Functions

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

BUCK1

3

I

Voltage sense for the resonant tank.

BUCK2

14

I

g

CBP

13

O

Internally generated low-voltage supply. Bypass to GND with 0.1-

µF bypass coordinator.

COMP1

4

O

Outputs of the error amplifiers for the two channels.

COMP2

12

O

DIM

8

I

Reference signal applied to the LFD PWM that determines the LFD duty cycle.

FB1

5

I

Inverting inputs of the error amplifiers.

FB2

11

I

g

GND

15

–

Power supply return.

LFDSYNC

9

I

2.5-V logic-compatible pin used to synchronize the LFD oscillator.

MODE

10

I

Start-up timing control.

OUT1

1

O

FET drive outputs for the two channels. The pin is driven between GND and internal voltage

OUT2

16

O

g

(typically 12 V).

RC

6

O

Connection for the low-frequency dimming (LFD) charge resistor. The other terminal of the resistor is

connected to the LFD capacitor, CLFD.

RD

7

O

Connection for low-frequency dimming (LFD) discharge resistor, RD. The other terminal of the resistor is

connected to the LFD capacitor, CLFD. LFD frequency us user programmable by varying RC, RD and

CFLD.

VIN

2

I

Power supply input. 4.5 V to 25 V.

detailed pin descriptions

DIM – The range is approximately 0.5 V to 3 V for the programmed minimum 100% duty cycle. If the LFDSYNC

pin is pulled above 2.25 V before MODE crosses the LFD enable threshold and is held high, the function of DIM

changes from an analog voltage, which determines the LFD duty cycle, to a digital signal (2.5-V logic

compatible) which turns the lamps on or off directly. This allows users to implement their own LFD solution and

easily interface it to the UCC3974. Pulling this pin above 3.0 V (weak internal pull-up device is provided) causes

the LFD section of the device to provide 100% LFD duty cycle.

LFDSYNC – This 2.5-V logic compatible pin is used to synchronize the LFD oscillator. A positive pulse restarts

the LFD ramp. Weak internal pull-down device provided. This pin must be set high when digital LFD mode

control is required.

MODE – This pin controls the start-up timing for the device. A capacitor is connected from this pin to ground

and has a constant current forced into it. The pin voltage controls the state of the device. When the system has

a power cycle, the pin is discharged to ground..

MODE PIN

VOLTAGE

FUNCTION

VMODE < 0.5 V

All circuitry is disabled.

VMODE > 0.5 V

Internal circuitry is enabled.

VMODE > 1.0 V

Output driver is enabled.

VMODE > 3.0 V

Enable open lamp detection circuitry.

VMODE > 4.0 V

Enable low-frequency dimming (LFD).

BUCK1/BUCK2 – These pins are used to sense the voltage on the resonant tank. This voltage is used for

synchronizing the internal high-frequency oscillators with the resonant tanks. This voltage is also used to detect

an open lamp condition when MODE is above 3 V.