UCC2974

UCC3974

SLUS485A – JULY 2001 – REVISED NOVEMBER 2001

10

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APPLICATION INFORMATION

LFD–PWM

LAMP ON

LAMP OFF

DIM

CT

UDG–01024

Figure 4. LFD Waveforms

Note from the Figure 4 that the LFD-PWM output is turned on at the start of the discharge cycle and is turned

0.5 V.

The LFD oscillator runs free at some frequency determined by the external timing components. The LFD

oscillator can be synchronized to a system clock signal. by applying this clock signal to the LFDSYNC pin. The

signal must not be applied during power up since the MODE pin’s crossing of the LFD_ENABLE threshold

determines the function DIM takes on. If the synchronization signal is applied during power up, unpredictable

results may occur. The synchronization frequency should be fairly close to (but higher than) the free run

frequency of the oscillator. The operating range for the DIM signal is reduced when synchronizing the LFD

oscillator just as with any other PWM. A synchronization pulse causes termination of the current charge cycle

and starts a discharge. The ratio of free run to synchronization frequencies is the reduction factor for DIM’s

operating range.

For instance if the free-run frequency is 90% of the synchronization frequency, DIM is active over the 0.5-V to

2.75-V range instead of the 0.5-V to 3-V range. As a general recommendation, the free-run frequency should

be kept within the 100-Hz to 1-kHz range, and synchronization should be limited to 120% of the free-run

frequency to preserve control range on DIM.

output driver

The OUT1 and OUT2 pins are designed to directly drive small power MOSFETs. Output drive capability is limited

by the 50-

Ω maximum resistance of the driver. For large FETs where this drive level is insufficient, a separate

driver is required. Note also that the output drive level is limited to approximately 12 V if the input voltage

exceeds that level. For input voltages below 12 V, the driver drives to slightly below the input voltage.