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OMAP3530ECBBA Datenblatt(PDF) 232 Page - Texas Instruments

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Teilenummer OMAP3530ECBBA
Bauteilbeschribung  OMAP3530 and OMAP3525 Applications Processors
PDF  265 Pages
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Hersteller  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
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OMAP3530ECBBA Datenblatt(HTML) 232 Page - Texas Instruments

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1-WIRE
tLOWR
tRDV_ and_ tREL
tSLOT_ and_ tREC
030-100
1-WIRE
tRSTH
tPDL
tPDH
tRTSL
030-099
HDQ
Break
0_(LSB )
1
6
7_(MSB )
tRSPS
0_(LSB )
1
6
Command _byte _written
Data _byte _received
030-098
HDQ
tDW1
tDW 0
tCYCD
030-097
OMAP3530, OMAP3525
SPRS507H – FEBRUARY 2008 – REVISED OCTOBER 2013
www.ti.com
Figure 6-57. HDQ Write Bit Timing (Command/Address or Data)
Figure 6-58. HDQ Communication Timing
6.6.6.2
1-Wire Protocol
Table 6-112 and Table 6-113 assume testing over the recommended operating conditions (see Figure 6-
59 through Figure 6-61).
Table 6-112. 1-Wire Timing Requirements
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
tPDH
Presence pulse delay high
68
μs
tPDL
Presence pulse delay low
68 – tPDH
tRDV + tREL
Read bit-zero time
102
Table 6-113. 1-Wire Switching Characteristics
PARAMETER
DESCRIPTION
MIN
TYP
MAX
UNIT
tRSTL
Reset time low
484
μs
tRSTH
Reset time high
484
tSLOT
Write bit cycle time
102
tLOW1
Write bit-one time
1.3
tLOW0
Write bit-zero time
101
tREC
Recovery time
134
tLOWR
Read bit strobe time
13
Figure 6-59. 1-Wire Break (Reset) Timing
Figure 6-60. 1-Wire Read Bit Timing (Data)
232
TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS
Copyright © 2008–2013, Texas Instruments Incorporated
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Product Folder Links: OMAP3530 OMAP3525



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