The **AC101L-PB01-R** is an integrated circuit (IC) primarily used as a **Single-Port 10/100 Ethernet Transceiver (PHY)**. It is manufactured by X-Powers (often associated with Allwinner technology ecosystems) and is designed to handle the physical layer functions of Ethernet communication. --- ### 1. Key Technical Specifications The following table summarizes the primary electrical and functional characteristics of the AC101L: | Feature | Specification | | :--- | :--- | | **Type** | Ethernet Physical Layer Transceiver (PHY) | | **Data Rate** | 10Base-T / 100Base-TX (Fast Ethernet) | | **Interface** | RMII (Reduced Media Independent Interface) | | **Package** | QFN-32 (5mm x 5mm) | | **Supply Voltage** | 3.3V (IO/Analog) and 1.1V (Core) | | **Power Consumption** | Ultra-low power design (< 200mW active) | | **Standards** | IEEE 802.3 / 802.3u compliant | --- ### 2. Core Functional Blocks The AC101L-PB01-R consists of several internal electronic subsystems: 1. **Analog Front End (AFE):** Handles the transmission and reception of signals over the copper twisted-pair cable. It includes the line driver and the receiver with adaptive equalization. 2. **DSP Engine:** Uses Digital Signal Processing to mitigate noise, crosstalk, and echo, ensuring stable data transmission over long cables (up to 100 meters). 3. **Clock Generation:** Often utilizes a 25MHz crystal or external OSC to generate internal high-frequency timing. 4. **Auto-Negotiation:** Automatically determines the best possible speed (10 or 100 Mbps) and duplex mode (Half or Full) between two connected devices. --- ### 3. Pinout and Interface Layout As a **QFN-32** package, the chip is compact. The primary pins are categorized as follows: * **RMII Pins:** `TXD[0:1]`, `TX_EN`, `RXD[0:1]`, `CRS_DV`, and `REF_CLK`. This is the digital bridge to the MAC (Media Access Controller), usually found inside a CPU/MCU. * **MDI Pins:** `TP_TXN/P` and `TP_RXN/P`. These connect to the Ethernet transformer (Magnetics) and the RJ45 port. * **Management Interface:** `MDC` and `MDIO`. Used by the processor to configure the PHY registers. * **Status Indicators:** Pins for `LED_LINK` and `LED_ACT` to show network status. --- ### 4. Common Applications Due to its low power consumption and small footprint, this part is frequently found in: * **OTT Boxes / Android TV Boxes:** Particularly those using Allwinner SoCs (e.g., H3, H6, H616). * **IP Cameras:** For wired security network stability. * **Industrial Gateways:** Providing Ethernet connectivity to embedded systems. * **Development Boards:** Similar to Orange Pi or Banana Pi. --- ### 5. Schematic Requirements To implement the AC101L-PB01-R, the following external components are typically required: * **Ethernet Magnetics:** A 1:1 transformer for isolation. * **25MHz Crystal:** For the internal PLL. * **Decoupling Capacitors:** 0.1µF and 10µF caps near power pins to filter high-frequency noise. * **Pull-up/down Resistors:** For strapping pins to set the hardware address (PHYAD).