## Overview of the Zilog Z8000 Architecture The **Zilog Z8000** is a 16-bit microprocessor introduced in 1979, shortly after the Intel 8086. It represented a significant leap from the 8-bit Z80, moving toward a "minicomputer-style" architecture with a highly regular register set and advanced memory management capabilities. --- ### 1. Key Internal Components The Z8000 was designed in two primary versions to cater to different system complexities: | Part Number | Type | Pin Count | Address Space | Description | | :--- | :--- | :--- | :--- | :--- | | **Z8001** | Segmented | 48-pin DIP | 8 MB | Features a 7-bit segment number and 16-bit offset. Requires an external MMU. | | **Z8002** | Non-segmented | 40-pin DIP | 64 KB | A simpler version for smaller applications; uses only 16-bit addresses. | #### Register Set Unlike the 8086, the Z8000 featured a very flexible and orthogonal register file: * **16 General-Purpose Registers (R0–R15):** All are 16-bit. * **Flexibility:** They can be used as 8-bit registers (RH0-RL7), 32-bit long-word registers (RR0-RR14), or 64-bit quad-word registers (RQ0-RQ12). * **Special Purpose:** R15 is typically used as the **Stack Pointer (SP)**. --- ### 2. The Z8010 Memory Management Unit (MMU) To handle the 8 MB address space of the Z8001, Zilog developed the **Z8010 MMU**. This is a critical electronic part for high-end Z8000 systems: * **Segmentation:** It translates logical segment addresses into physical addresses. * **Protection:** It provides memory protection attributes (read-only, system-only, etc.), preventing user programs from crashing the OS. * **Multi-MMU Support:** Systems could use multiple Z8010s to support even larger memory maps or multiple tasks. --- ### 3. Support Peripheral Chips The Z8000 family included a suite of dedicated "Z-Bus" peripherals designed to interface seamlessly with the CPU: | Part Number | Function | Description | | :--- | :--- | :--- | | **Z8030 SCC** | Serial Comm. Controller | Multi-protocol serial I/O (Async, Bisync, SDLC/HDLC). | | **Z8036 CIO** | Counter/Timer & Parallel I/O | Three 16-bit counters and two 8-bit parallel ports. | | **Z8038 FIO** | FIFO Input/Output | A buffer chip to interface the Z8000 with other CPUs or slower buses. | | **Z8016 DTC** | DMA Transfer Controller | Handles high-speed data transfers without CPU intervention. | --- ### 4. Hardware Signal Characteristics * **The Z-Bus:** A multiplexed address/data bus (AD0–AD15) used to reduce pin count. * **Status Signals (ST0–ST3):** These pins output a 4-bit code indicating what the CPU is currently doing (e.g., Instruction Fetch, Memory Read, I/O, Interrupt Acknowledge). * **Clock:** Typically operated at frequencies between 4 MHz and 10 MHz. --- ### 5. Historical Significance The Z8000's electronics were sophisticated, but it struggled in the market against the Intel 8086 and the Motorola 68000. It did, however, find significant use in: * **Military Systems:** Due to its robust architecture. * **Unix Workstations:** Early machines like the Onyx C8002 used the Z8001. * **Arcade Games:** Used in Namco's *Pole Position*.