4-Mbit (256K x 18) Pipelined SRAM with NoBL™ Architecture

Features
• Pin compatible and functionally equivalent to ZBT™ devices
• Internally self-timed output buffer control to eliminate
   the need to use OE
• Byte Write capability
• 256K x 18 common I/O architecture
• 3.3V core power supply (VDD)
• 2.5V/3.3V I/O power supply (VDDQ)
• Fast clock-to-output times
   — 2.6 ns (for 250-MHz device)
• Clock Enable (CEN) pin to suspend operation
• Synchronous self-timed writes
• Asynchronous output enable (OE)
• Available in lead-free 100-Pin TQFP package
• Burst Capability—linear or interleaved burst order
• ZZ” Sleep Mode Option and Stop Clock option