Description
The AT40KAL is a family of fully PCI-compliant, SRAM-based FPGAs with distributed 10ns programmable synchronous/asynchronous, dual-port/single-port SRAM, eight global clocks, Cache Logic ability (partially or fully reconfigurable without loss of data), automatic component generators, and range in size from 5,000 to 50,000 usable gates. I/O counts range from 114 to 161 in industry standard packages ranging from 144-pin LQFP to 208-pin PQFP, and support 3.3V designs.

Features
• Ultra High Performance
   ̶ System Speeds to 100MHz
   ̶ Array Multipliers > 50MHz
   ̶ 10ns Flexible SRAM
   ̶ Internal Tri-state Capability in Each Cell
• FreeRAM™
   ̶ Flexible, Single/Dual Port, Synchronous/Asynchronous 10ns SRAM
   ̶ 2,048 – 18,432 bits of Distributed SRAM Independent of Logic Cells
• 128 – 384 PCI Compliant I/Os
   ̶ Programmable Output Drive
   ̶ Fast, Flexible Array Access Facilitates Pin Locking
   ̶ Pin-compatible with XC4000 and XC5200 FPGAs
• Eight Global Clocks
   ̶ Fast, Low Skew Clock Distribution
   ̶ Programmable Rising/Falling Edge Transitions
   ̶ Distributed Clock Shutdown Capability for Low Power Management
   ̶ Global Reset/Asynchronous Reset Options
   ̶ Four Additional Dedicated PCI Clocks
• Cache Logic® Dynamic Full/Partial Re-configurability In-System
   ̶ Unlimited Re-programmability via Serial or Parallel Modes
   ̶ Enables Adaptive Designs
   ̶ Enables Fast Vector Multiplier Updates
• Pin-compatible Package Options
   ̶ Low-profile, Plastic Quad Flat Packs (LQFP and PQFP)
• User-friendly Design Tools
   ̶ Supoorted by industry standard EDA tools such as Precision Synthesis, Leondardo Spectrum, Synplify, and Others
   ̶ Timing Driven Placement and Routing
   ̶ Automatic/Interactive Multi-chip Partitioning
   ̶ Fast, Efficient Synthesis
   ̶ Over 75 Automatic Component Generators Create 1000s of Reusable, Fully Deterministic Logic, and RAM Functions
• Supply Voltage 3.3V
• 5V I/O Tolerant