■ On-chip 32-bit Arm Cortex-R52 processor
● High-speed realtime control with operating frequency of 200/400
MHz
● On-chip Single 32-bit Arm Cortex-R52 (revision r1p2)
● Tightly coupled memory (TCM) with ECC
– CPU0: 128 KB/128 KB
● Instruction cache/data cache with ECC
– CPU0: 16 KB per cache
● High-speed interrupt
● The FPU supports addition, subtraction, multiplication, division,
multiply-and-accumulate, and square-root operations at singleprecision
and double-precision.
● The NEON, Advanced SIMD, supports integer or single precision
results.
● Harvard architecture with 8-stage pipeline
● Supports the memory protection unit (MPU)
● Arm CoreSight architecture, includes support for debugging
through JTAG and SWD interfaces.
■ Low power consumption
● Standby mode and module stop function
■ On-chip SRAM
● 1.5 MB of the on-chip SRAM with ECC
● 150/200 MHz
■ Data transfer
● DMAC: 8 channels × 2 units
■ Event link controller
● Module operations can be started by event signals rather than by
interrupt handlers.
● Linked operation of modules is available even while the CPU is in
the standby state.
■ Reset and power supply voltage control
● Four reset sources including a pin reset
■ Clock functions
● External clock/oscillator input frequency: 25 MHz
● CPU clock frequency: 200/400 MHz or 150/300 MHz
● System clock frequency: 200 MHz or 150 MHz
● Low-speed on-chip oscillator (LOCO): 240 kHz
■ Safety functions
● Register write protection, input clock oscillation stop detection and
CRC
● Master Memory Protection Unit (MPU)
■ Security functions (optional)
● Boot mode with security through encryption
● JTAG authentication
● Cryptologic accelerator
● TRNG
■ Various communications interfaces
● Ethernet
– EtherCAT slave Controller: 3 ports
– Ethernet switch: 3 ports
– Ethernet MAC: 1 port
● USB 2.0 high-speed host/functions: 1 channel
● CAN/CANFD (compliant with ISO11898-1): 2 channels
● SCI with 16-byte transmission and reception FIFOs: 6 channels
● I2C bus interface: 3 channel for transfer at up to 400 kbps
● SPI: 4 channels
● xSPI: 2 channels
■ External host interfaces
● Serial host interface (SHOSTIF)
● Parallel host interface (PHOSTIF)