Features:
◆ True Dual-Port memory cells which allow simultaneous
access of the same memory location
◆ High-speed clock to data access
– Commercial: 4.2/5/6ns (max.)
– Industrial: 5ns (max)
◆ Pipelined output mode
◆ Counter enable and reset features
◆ Dual chip enables allow for depth expansion without
additional logic
◆ Full synchronous operation on both ports
– 7.5ns cycle time, 133MHz operation (9.6 Gbps bandwidth)
– Fast 4.2ns clock to data out
– 1.8ns setup to clock and 0.7ns hold on all control, data, and
address inputs @ 133MHz
– Data input, address, byte enable and control registers
– Self-timed write allows fast cycle time
◆ Separate byte controls for multiplexed bus and bus
matching compatibility
◆ LVTTL- compatible, single 3.3V (±150mV) power supply for
core
◆ LVTTL- compatible, selectable 3.3V (±150mV)/2.5V (±125mV)
power supply for I/Os and control signals on each port
◆ Industrial temperature range (-40°C to +85°C) is
available for selected speeds
◆ Available in a 128-pin Thin Quad Plastic Flatpack (TQFP)
and 208-pin fine pitch Ball Grid Array, and 256-pin
Ball Grid Array
◆ Green parts available, see ordering information