General description

The UJA1061 fail-safe System Basis Chip (SBC) replaces basic discrete components that are common in every Electronic Control Unit (ECU) with a Controller Area Network (CAN) and a Local Interconnect Network (LIN) interface. The fail-safe SBC supports all networking applications that control various power and sensor peripherals by using fault-tolerant CAN as the main network interface and LIN as a local sub-bus.

Features and benefits

General

■ Contains a full set of CAN and LIN ECU functions:

   ♦ CAN transceiver and LIN transceiver

   ♦ Voltage regulator for the microcontroller (3.3 V or 5.0 V)

   ♦ Separate voltage regulator for the CAN transceiver (5 V)

   ♦ Enhanced window watchdog with on-chip oscillator

   ♦ Serial Peripheral Interface (SPI) for the microcontroller

   ♦ ECU power management system

   ♦ Fully integrated autonomous fail-safe system

■ Designed for automotive applications:

   ♦ Supports 14 V, 24 V and 42 V architectures

   ♦ Excellent ElectroMagnetic Compatibility (EMC) performance

   ♦ ±8 kV ElectroStatic Discharge (ESD) protection Human Body Model (HBM) for off-board pins

   ♦ ±6 kV ElectroStatic Discharge (ESD) protection IEC 61000-4-2 for off-board pins

   ♦ ±60 V short-circuit proof CAN/LIN-bus pins

   ♦ Battery and CAN/LIN-bus pins are protected against transients in accordance with ISO 7637

   ♦ Very low sleep current

■ Supports remote flash programming via the CAN-bus

■ Small 6.1 mm × 11 mm HTSSOP32 package with low thermal resistance

CAN transceiver

■ ISO 11898-3 compliant fault-tolerant CAN transceiver

■ Enhanced error signalling and reporting

■ Dedicated low dropout voltage regulator for the CAN-bus:

   ♦ Independent from microcontroller supply

   ♦ Guarded by CAN-bus failure management

   ♦ Significantly improves EMC performance

■ Partial networking option with global wake-up feature, allows selective CAN-bus communication without waking up sleeping nodes

■ Bus connections are truly floating when power is off

■ Ground shift detection

LIN transceiver

■ LIN 2.0 compliant LIN transceiver

■ Enhanced error signalling and reporting

■ Downward compatible with LIN 1.3 and the TJA1020

Power management

■ Smart operating modes and power management modes

■ Cyclic wake-up capability in Standby and Sleep modes

■ Local wake-up input with cyclic supply feature

■ Remote wake-up capability via the CAN-bus and LIN-bus

■ External voltage regulators can easily be incorporated in the power supply system (flexible and fail-safe)

■ 42 V battery-related high-side switch for driving external loads such as relays and wake-up switches

■ Intelligent maskable interrupt output

Fail-safe features

■ Safe and predictable behavior under all conditions

■ Programmable fail-safe coded window and time-out watchdog with on-chip oscillator, guaranteeing autonomous fail-safe system supervision

■ Fail-safe coded 16-bit SPI interface for the microcontroller

■ Global enable pin for the control of safety-critical hardware

■ Detection and detailed reporting of failures:

   ♦ On-chip oscillator failure and watchdog alerts

   ♦ Voltage regulator undervoltages

   ♦ CAN and LIN-bus failures (short-circuits and open-circuit bus wires)

   ♦ TXD and RXD clamping situations and short-circuits

   ♦ Clamped or open reset line

   ♦ SPI message errors

   ♦ Overtemperature warning

   ♦ ECU ground shift (two selectable thresholds)

■ Rigorous error handling based on diagnostics

■ 23 bits of access-protected RAM is available e.g. for logging of cyclic problems

■ Reporting in a single SPI message; no assembly of multiple SPI frames needed

■ limp-home output signal for activating application hardware in case system enters Fail-safe mode (e.g. for switching on warning lights)

■ Fail-safe coded activation of Software development mode and Flash mode

■ Unique SPI readable device type identification

■ Software-initiated system reset