1FEATURES
2• Deserializes One to Six Bus LVDS Input Serial
Data Streams with Embedded Clocks
• IEEE 1149.1 (JTAG) Compliant and At-Speed
BIST Test Modes
• Parallel Clock Rate 16-66MHz
• On Chip Filtering for PLL
• High Impedance Inputs Upon Power Off (Vcc =
0V)
• Single Power Supply at +3.3V
• 196-Pin NFBGA Package (Low-Profile Ball Grid
Array) Package
• Industrial Temperature Range Operation:
−40°C to +85°C
• ROUTn[0:9] and RCLKn Default High when
Channel is Not Locked
• Powerdown Per Channel to Conserve Power
on Unused Channels

DESCRIPTION
The SCAN926260 integrates six 10-bit deserializer
devices into a single chip. The SCAN926260 can
simultaneously deserialize up to six data streams that
have been serialized by TI’s 10-bit Bus LVDS
serializers. In addition, the SCAN926260 is compliant
with IEEE standard 1149.1 and also features an At-
Speed Built-In Self Test (BIST). For more details,
please see the sections titled IEEE 1149.1 Test
Modes and BIST Alone Test Modes.
Each deserializer block in the SCAN926260 has it’s own powerdown pin (PWRDWN[n])and operates
independently with its own clock recovery circuitry
and lock-detect signaling. In addition, a master
powerdown pin (MS_PWRDWN) which puts all the
entire device into sleep mode is provided.
The SCAN926260 uses a single +3.3V power supply
and consumes 1.2W at 3.3V with a PRBS-15 pattern
on all channels at 660Mbps.