1 Features
1• Small package size:
– WQFN 3 mm × 3 mm
• 8 channels configurable as any combination of:
– Up to 8 analog inputs, digital inputs, or digital
outputs
• GPIOs for I/O expansion:
– Open-drain, push-pull digital outputs
• Analog watchdog:
– Programmable thresholds per channel
– Event counter for transient rejection
• Wide operating ranges:
– AVDD: 2.35 V to 5.5 V
– DVDD: 1.65 V to 5.5 V
– –40°C to +85°C temperature range
• Enhanced-SPI digital interface:
– High-speed, 60-MHz interface
– Achieve full throughput with >13.5-MHz SPI
• CRC for read/write operation:
– CRC on data read/write
– CRC on power-up configuration
• Programmable averaging filters
• Root-mean-square module:
– 16-bit true RMS output
– Programmable RMS time window
• Zero-crossing-detect module:
– ZCD output corresponding to analog input
– Built-in transient rejection and hysteresis
– Digitally adjustable detection threshold

2 Applications
• Refrigerator and freezer
• Rack server
• Mixed module (AI, AO, DI, DO)
• AC drive power stage module

3 Description
The ADS7028 is an easy-to-use, 8-channel,
multiplexed, 12-bit, 1-MSPS, successive
approximation register analog-to-digital converter
(SAR ADC). The eight channels can be
independently configured as either analog inputs,
digital inputs, or digital outputs. The device has an
internal oscillator for the ADC conversion process.
The ADS7028 communicates through an SPIcompatible
interface and operates in either
autonomous or single-shot conversion mode. The
ADS7028 implements the analog watchdog function
by event-triggered interrupts per channel using a
digital window comparator with programmable high
and low thresholds, hysteresis, and an event counter.
The ADS7028 has a built-in cyclic redundancy check
(CRC) for data read/write operations and the powerup
configuration. The ADS7028 features a root-meansquare
(RMS) module that computes a 16-bit true
RMS result for any analog input channel. The
integrated zero-crossing-detect (ZCD) module allows
for transient rejection and hysteresis near the
configurable threshold crossings.