FEATURES
· Single 3.3-V supply (1.8-V internal core
voltage with regulator)
· 3.3-V and 5-V PCI signaling environments
· Serial bus data rates of 100M bits/s, 200M
bits/s, 400M bits/s, and 800M bits/s
· Physical write posting of up to three
outstanding transactions
· Serial ROM or boot ROM interface supports
2-wire serial EEPROM devices
· 33-MHz/64-bit and 33-MHz/32-bit selectable
PCI interface
· Multifunction terminal (MFUNC terminal 1):
– PCI_CLKRUN protocol per the PCI Mobile
Design Guide
– General-purpose I/O
– CYCLEIN/CYCLEOUT for external cycle
timer control for customized
synchronization
· PCI burst transfers and deep FIFOs to
tolerate large host latency:
– Transmit FIFO—5K asynchronous
– Transmit FIFO—2K isochronous
– Receive FIFO—2K asynchronous
– Receive FIFO—2K isochronous
· D0, D1, D2, and D3 power states and PME
events per the PCI Bus Power Management
Interface Specification
· Programmable asynchronous transmit
threshold
· Isochronous receive dual-buffer mode
· Out-of-order pipelining for asynchronous
transmit requests
· Register access fail interrupt when the PHY
SYSCLK is not active
· Initial bandwidth available and initial
channels available registers
· Digital video and audio performance
enhancements
· Fabricated in advanced low-power CMOS
process
· Packaged in 144-terminal LQFP (PGE) or
176-ball MicroStar BGA (GGW)

DESCRIPTION
The TSB82AA2 OHCI-Lynx is a discrete 1394b link-layer device, which has been designed to meet the
demanding requirements of today’s 1394 bus designs. The TSB82AA2 device is capable of exceptional 800M
bits/s performance; thus, providing the throughput and bandwidth to move data efficiently and quickly between
the PCI and 1394 buses. The TSB82AA2 device also provides outstanding ultra-low power operation and
intelligent power management capabilities. The device provides the IEEE 1394 link function and is compatible
with 100M bits/s, 200M bits/s, 400M bits/s, and 800M bits/s serial bus data rates.
The TSB82AA2 improved throughput and increased bandwidth make it ideal for today’s high-end PCs and open
the door for the development of S800 RAID- and SAN-based peripherals.
The TSB82AA2 OHCI-Lynx operates as the interface between a 33-MHz/64-bit or 33-MHz/32-bit PCI local bus
and a compatible 1394b PHY-layer device (such as the TSB81BA3 device) that is capable of supporting serial
data rates at 98.304M, 196.608M, 393.216M, or 786.432M bits/s (referred to as S100, S200, S400, or S800
speeds, respectively). When acting as a PCI bus master, the TSB82AA2 device is capable of multiple cacheline
bursts of data, which can transfer at 264M bytes/s for 64-bit transfers or 132M bytes/s for 32-bit transfers after
connecting to the memory controller.