▪ Four differential outputs
▪ Excellent jitter performance:
— < 200fs (typical) RMS (including spurs):
12kHz to 20MHz for integer-divider outputs in jitter
attenuator mode or in fractional-feedback synthesizer mode
▪ Operating Modes: Synthesizer, Jitter Attenuator
▪ Operates from a 10MHz to 54MHz fundamental-mode crystal
▪ Initial holdover accuracy of +50ppb
▪ Accepts up to two LVPECL, LVDS, LVHSTL, or LVCMOS input clocks
— Accepts frequencies ranging from 8kHz to 875MHz
— Auto and manual clock selection with hitless switching
— Clock input monitoring including support for gapped clocks
▪ Phase-slope limiting and fully hitless switching options to
control output clock phase transients
▪ Three outputs generate LVPECL / LVDS / HCSL clocks, one
output generates LVPECL / LVDS / HCSL / LVCMOS clocks