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74LVC2G34-Q100 Datenblatt (PDF) - Nexperia B.V. All rights reserved

74LVC2G34-Q100 Datasheet PDF - Nexperia B.V. All rights reserved
Teilenummer 74LVC2G34-Q100_V01
Download  74LVC2G34-Q100 Download
Filegröße   776.28 Kbytes
Page   13 Pages
Hersteller  NEXPERIA [Nexperia B.V. All rights reserved]
Direct Link  https://www.nexperia.com/
Logo NEXPERIA - Nexperia B.V. All rights reserved
Bauteilbeschribung Dual buffer gate

74LVC2G34-Q100 Datasheet (PDF)

Go To PDF Page Download Datenblatt
74LVC2G34-Q100 Datasheet PDF - Nexperia B.V. All rights reserved

Teilenummer 74LVC2G34-Q100_V01
Download  74LVC2G34-Q100 Click to download

Filegröße   776.28 Kbytes
Page   13 Pages
Hersteller  NEXPERIA [Nexperia B.V. All rights reserved]
Direct Link  https://www.nexperia.com/
Logo NEXPERIA - Nexperia B.V. All rights reserved
Bauteilbeschribung Dual buffer gate

74LVC2G34-Q100 Datenblatt (HTML) - Nexperia B.V. All rights reserved


74LVC2G34-Q100 Produktdetails

General description
The 74LVC2G34-Q100 provides two buffers.
Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of
these devices in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
Features and benefits
 Automotive product qualification in accordance with AEC-Q100 (Grade 1)
 Specified from 40 C to +85 C and from 40 C to +125 C
 Wide supply voltage range from 1.65 V to 5.5 V
 5 V tolerant inputs for interfacing with 5 V logic
 High noise immunity
 Complies with JEDEC standard:
 JESD8-7 (1.65 V to 1.95 V)
 JESD8-5 (2.3 V to 2.7 V)
 JESD8B/JESD36 (2.7 V to 3.6 V)
 ESD protection:
 MIL-STD-883, method 3015 exceeds 2000 V
 HBM JESD22-A114F exceeds 2000 V
 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
 24 mA output drive (VCC = 3.0 V)
 CMOS low power consumption
 Latch-up performance exceeds 250 mA
 Direct interface with TTL levels




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