The MC88PL117 utilizes proven phase–locked loop clock driver technology to create a large fan–out, multiple frequency and phase, low skew clock driver. The 88PL117 provides the clock frequencies necessary to drive systems using the PowerPC™ 601 microprocessor and the Pentium™ microprocessor (see applications section for details).

• Clock Driver for PowerPC 601 and Pentium Microprocessors
• 14 programmable outputs
• Maximum output–to–output skew of 500ps for a single frequency
• Maximum output–to–output skew of 500ps for multiple frequencies
• fMAX of 2X_Q = 120MHz
• One output with programmable phase capability
• ±36mA DC current outputs drive 50Ω transmission lines
• A lock indicator output (LOCK) goes high when steady–state phase–lock is achieved
• OE/MR 3–state control
• Dedicated feedback output
• Two selectable clock inputs
• PLL enable pin for testability
• Dynamic Switch Between SYNC Inputs