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SL74HCT573D Datenblatt (PDF) - System Logic Semiconductor

SL74HCT573D Datasheet PDF - System Logic Semiconductor
Teilenummer SL74HCT573D
Download  SL74HCT573D Download
Filegröße   54.45 Kbytes
Page   6 Pages
Hersteller  SLS [System Logic Semiconductor]
Direct Link  http://www.slsemicon.co.kr/e_index.htm
Logo SLS - System Logic Semiconductor
Bauteilbeschribung Octal 3-State Noninverting Transparent Latch(High-Performance Silicon-Gate CMOS)

SL74HCT573D Datasheet (PDF)

Go To PDF Page Download Datenblatt
SL74HCT573D Datasheet PDF - System Logic Semiconductor

Teilenummer SL74HCT573D
Download  SL74HCT573D Click to download

Filegröße   54.45 Kbytes
Page   6 Pages
Hersteller  SLS [System Logic Semiconductor]
Direct Link  http://www.slsemicon.co.kr/e_index.htm
Logo SLS - System Logic Semiconductor
Bauteilbeschribung Octal 3-State Noninverting Transparent Latch(High-Performance Silicon-Gate CMOS)

SL74HCT573D Datenblatt (HTML) - System Logic Semiconductor


SL74HCT573D Produktdetails

Octal 3-State Noninverting Transparent Latch
High-Performance Silicon-Gate CMOS

The SL74HCT573 is identical in pinout to the LS/ALS573. This device may be used as a level converter for interfacing TTL or NMOS outputs to High-Speed CMOS inputs.
These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. When Latch Enable goes low, data meeting the setup and hold time becomes latched.
The Output Enable input does not affect the state of the latches, but when Output Enable is high, all device outputs are forced to the high-impedance state. Thus, data may be latched even when the outputs are not enabled.

 • TTL/NMOS-Compatible Input Levels
 • Outputs Directly Interface to CMOS, NMOS, and TTL
 • Operating Voltage Range: 4.5 to 5.5 V
 • Low Input Current: 1.0 μA




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