The SN54/74LS114A offers common clock and common clear inputs and individual J, K, and set inputs. These monolithic dual flip-flops are designed sothat when the clock goes HIGH, the inputs are enabled and data will be accepted.The logic level of the J and K inputs may be allowed to change when theclock pulse is HIGH and the bistable willperform according to the truth tableas long asminimum set-up times are observed. Input data is transferred to the outputs on the negative-going edge of the clock pulse.