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CYUSB302X Datenblatt(PDF) 17 Page - Cypress Semiconductor

Teilenummer CYUSB302X
Bauteilbeschribung  SD3??USB and Mass Storage Peripheral Controller
PDF  34 Pages
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Hersteller  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CYUSB302X Datenblatt(HTML) 17 Page - Cypress Semiconductor

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Document Number: 001-55190 Rev. *L
Page 17 of 34
CYUSB302x
tSDOS CMD
Host output setup time for CMD
6
–
ns
tSDOS DAT
Host output setup time for DAT
6
–
ns
tSDOH CMD
Host output hold time for CMD
2
–
ns
tSDOH DAT
Host output hold time for DAT
2
–
ns
tSCLKR
Clock rise time
–
2
ns
tSCLKF
Clock fall time
–
2
ns
tSDCK
Clock cycle time
20
–
ns
SDFREQ
Clock frequency
–
50
MHz
tSDCLKOD
Clock duty cycle
40
60
%
SD-SDR50
tSDIS CMD
Host input setup time for CMD
1.5
–
ns
tSDIS DAT
Host input setup time for DAT
1.5
–
ns
tSDIH CMD
Host input hold time for CMD
2.5
–
ns
tSDIH DAT
Host input hold time for DAT
2.5
–
ns
tSDOS CMD
Host output setup time for CMD
3
–
ns
tSDOS DAT
Host output setup time for DAT
3
–
ns
tSDOH CMD
Host output hold time for CMD
0.8
–
ns
tSDOH DAT
Host output hold time for DAT
0.8
–
ns
tSCLKR
Clock rise time
–
2
ns
tSCLKF
Clock fall time
–
2
ns
tSDCK
Clock cycle time
10
–
ns
SDFREQ
Clock frequency
100
MHz
tSDCLKOD
Clock duty cycle
40
60
%
SD-DDR50
tSDIS CMD
Host input setup time for CMD
4
–
ns
tSDIS DAT
Host input setup time for DAT
0.92
–
ns
tSDIH CMD
Host input hold time for CMD
2.5
–
ns
tSDIH DAT
Host input hold time for DAT
2.5
–
ns
tSDOS CMD
Host output setup time for CMD
6
–
ns
tSDOS DAT
Host output setup time for DAT
3
–
ns
tSDOH CMD
Host output hold time for CMD
0.8
–
ns
tSDOH DAT
Host output hold time for DAT
0.8
–
ns
tSCLKR
Clock rise time
–
2
ns
tSCLKF
Clock fall time
–
2
ns
tSDCK
Clock cycle time
20
–
ns
SDFREQ
Clock frequency
50
MHz
tSDCLKOD
Clock duty cycle
45
55
%
Table 9. S-Port Timing Parameters[3] (continued)
Parameter
Description
Min
Max
Units
Note
3. All parameters guaranteed by design and validated through characterization.



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