SAFC161RI datasheet(39/60 Pages) SIEMENS

39 / 60 page

Semiconductor Group

1998-05-01

C161RI

The table below associates the combinations of these three bits with the respective clock generation

mode.

1) The maximum frequency depends on the duty cycle of the external clock signal.

Prescaler Operation

When pins P0.15-13 (P0H.7-5) equal ‘001’ during reset the CPU clock is derived from the internal

oscillator (input clock signal) by a 2:1 prescaler.

The frequency of

CPU is half the frequency of fXTAL and the high and low time of fCPU (i.e. the duration

of an individual TCL) is defined by the period of the input clock

XTAL.

The timings listed in the AC Characteristics that refer to TCLs therefore can be calculated using the

period of

XTAL for any TCL.

Direct Drive

When pins P0.15-13 (P0H.7-5) equal ‘011’ during reset the on-chip phase locked loop is disabled

and the CPU clock is directly driven from the internal oscillator with the input clock signal.

The frequency of

CPU directly follows the frequency of fXTAL so the high and low time of fCPU (i.e. the

duration of an individual TCL) is defined by the duty cycle of the input clock

XTAL.

The timings listed below that refer to TCLs therefore must be calculated using the minimum TCL

that is possible under the respective circumstances. This minimum value can be calculated via the

following formula:

TCLmin = 1/fXTAL × DCmin

(DC = duty cycle)

For two consecutive TCLs the deviation caused by the duty cycle of

XTAL is compensated so the

duration of 2TCL is always 1/

XTAL. The minimum value TCL

min therefore has to be used only once

for timings that require an odd number of TCLs (1,3,...). Timings that require an even number of

TCLs (2,4,...) may use the formula 2TCL = 1/

XTAL.

Note: The address float timings in Multiplexed bus mode (

t11 and t45) use the maximum duration of

TCL (TCLmax = 1/fXTAL × DCmax) instead of TCLmin.

C161RI Clock Generation Modes

P0.15-13

(P0H.7-5)

CPU Frequency

CPU =

XTAL × F

Notes

Reserved

Default configuration without pull-downs

110

Reserved

101

Reserved

100

Reserved

011

XTAL × 1

Direct drive 1)

010

Reserved

001

XTAL / 2

CPU clock via prescaler

000

Reserved

SAFC161RI Datenblatt(PDF) 39 Page - Siemens Semiconductor Group

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