LT1358 datasheet(32/40 Pages) LINER

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LTC2335-18

233518f

For more information www.linear.com/LTC2335-18

applicaTions inForMaTion

New data transaction windows open 10ms after power-

ing up or resetting the LTC2335-18, and at the end of

each conversion on the falling edge of BUSY. The data

transaction should be completed with a minimum tQUIET

time of 20ns prior to the start of the next conversion, as

shown in Figure 17. New control words are only accepted

within this recommended data transaction window, but

configuration changes take effect immediately with no ad-

ditional analog input settling time required before starting

the next conversion.

Just prior to the falling edge of BUSY and the opening of

a new data transaction window, SCKO is forced low and

SDO is updated with the latest conversion result from the

just-completed conversion. Rising edges on SCKI serially

clock the conversion result and analog input channel con-

figuration information out on SDO and trigger transitions

on SCKO that are skew-matched to the data on SDO. The

resulting SCKO frequency is half that of SCKI.

SCKI rising edges also latch control words provided on

SDI, which are used to set the SoftSpan range and chan-

nel for the next conversion, and program the sequencer.

See the section Configuring the Multiplexer and SoftSpan

Range for further details. SCKI is allowed to idle either

high or low in CMOS I/O mode. As shown in Figure 18,

the CMOS bus is enabled when CS is low and is disabled

and Hi-Z when CS is high, allowing the bus to be shared

across multiple devices.

ThedataonSDOareformattedasa24-bitpacketconsisting

ofan18-bitconversionresult,3-bitanalogchannelID,and

3-bitSoftSpancode,allpresentedMSBfirst.Assuggested

in Figures 17 and 18, if more than 24 SCKI clocks are

applied, the 24-bit packet is repeated indefinitely on SDO.

When interfacing the LTC2335-18 with a standard SPI

bus, capture output data at the receiver on rising edges

of SCKI. SCKO is not used in this case. In other applica-

tions, such as interfacing the LTC2335-18 with an FPGA

or CPLD, rising and falling edges of SCKO may be used

to capture serial output data on SDO in double data rate

(DDR) fashion. Capturing data using SCKO adds robust-

ness to delay variations over temperature and supply.

The LTC2335-18 guarantees a minimum data transfer

window(tACQ–tQUIET)of400nswhileconvertingat1Msps.

Thus, if an application needs to read the full 24-bit packet

of conversion result plus channel ID and SoftSpan, the

minimum usable SCKI frequency is 60MHz. Applications

needing to read only the conversion result may send only

18 SCKI pulses and thus have a minimum SCKI frequency

of45MHz.TheLTC2335-18supportsCMOSSCKIfrequen-

cies up to 100MHz.

Configuring the Multiplexer and SoftSpan Range in

CMOS I/O Mode

On power-up and after a reset, the LTC2335-18 defaults

to converting channels 0 through 7 sequentially, all in

SoftSpan 7. If this configuration does not need to be

changed, simply hold SDI low.

The LTC2335-18 multiplexer and SoftSpan range may

be controlled in two ways, depending on the needs of

the application. If the desired sequence of channels and

SoftSpan ranges are known ahead of time, the LTC2335-

18’s internal sequencer may be programmed with a se-

quence of up to 16 configurations, and will cycle through

those configurations on subsequent conversions without

further user intervention. Alternately, if ultimate flexibility

is desired, the LTC2335-18 may be directly controlled by

overwriting the sequencer each conversion with the chan-

nel and SoftSpan range for the following conversion. This

reconfiguration has no latency and requires no additional

settling time or digital I/O overhead.

Using the Sequencer

To use the internal sequencer of the LTC2335-18, first

program it as described below with the desired sequence

of up to 16 configurations. Each of these configurations

specifies the desired channel number and SoftSpan range

for one conversion. The LTC2335-18 will then apply the

first configuration to the first conversion, the second

configuration to the second conversion, and so on until

the end of the programmed sequence is reached, at which

point the cycle will start again from the beginning.

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