ISL9111, ISL9111A

FN7602 Rev.4.00

Page 9 of 15

Jun 4, 2012

2. UVLO function is disabled in the ISL9111A. The minimum

start-up voltage can be as low as 0.6V, and minimum

operating voltage can be as low as 0.5V after start-up. The

advantage of minimum operating voltage maximizes the

performance of a non-rechargeable battery, allowing the

system to operate until the battery is fully depleted.

Soft-start

When the device is enabled, the start-up cycle starts with linear

phase. During linear phase, the rectifying switch is turned on in a

current limited configuration, delivering about 200mA, until the

output capacitor is charged to approximately 90% of the input

voltage. At this point, PWM begins, and thus, boost operation

starts. If the output voltage is below 2.3V, PWM switching is done

at a fixed duty-cycle of 75% until the output voltage reaches 2.3V.

When the output voltage exceeds 2.3V, the closed-loop current

mode PWM loop overrides the duty cycle until the output voltage

is regulated. Peak inductor current is ramped to the final value

(typically 1A) during the soft-start period to limit in-rush current

from the input source. Fault monitoring begins approximately

2ms after the device is enabled.

Over-temperature Protection (OTP)

The device offers over-temperature protection. A temperature

sensor circuit is integrated and monitors the internal IC

temperature. Once the temperature exceeds the preset threshold

(typically +150°C), the IC shuts down immediately. The OTP has

a typical hysteresis of +25°C. When the device temperature

decreases by this, the device starts operating.

Overvoltage Protection (OVP)

The adjustable version of the ISL9111 and ISL9111A have built

in overvoltage protection (OVP) to enhance product robustness

should the voltage reach 5.9V (typical), the device will stop

switching. This turns off both power MOSFETs and the stored

the synchronous rectifier.

Fault Monitoring and Reporting

Fault monitoring starts 2ms after start-up. Table 1 shows the

response to different detected faults. Any fault condition shown

in Table 1 causes the FAULT pin to be taken low. The FAULT pin

condition is removed.

Board Layout Recommendations

The ISL9111 and ISL9111A are high frequency switching boost

converters. Accordingly, the converter creates fast voltage

changes and high switching current that may cause EMI and

stability issues if good PCB layout practices are not followed.

Although the ISL9111 and ISL9111A can tolerate short durations

of 8.0V transients, prolonged or higher amplitude excursions may

damage the device. Care should be taken to minimize the trace

inductance and reduce the area of the power loop.

Power components such as input capacitor, inductor and output

capacitor should be placed close to the device. Board traces that

carry high switching current should be routed wide and short. A

solid power ground plane is important for EMI suppression.

The switching node (SW pin) of the converter and the traces

connected to this pin are noisy. Noise sensitive traces such as the

feedback trace should be kept away from SW pin and traces. The

voltage divider should be placed close to the feedback pin to

prevent noise pickup. Figure 6 shows the recommended EVB

layout.

Fixed Output Voltage and Adjustable Output

Voltage

ISL9111 and ISL9111A offer options for fixed output voltages of

5V, 3.3V and 3V, or an adjustable output voltage.

For fixed output voltage versions (ISL9111-5.0, ISL9111A-5.0,

ISL9111-3.3, ISL9111A-3.3, ISL9111-3.0, ISL9111A-3.0), an

internal voltage divider is used (see “Block Diagram: ISL9111-

3.0/3.3/5.0V, ISL9111A-3.0/3.3/5.0V” on page 3). For the

adjustable output voltage version (ISL9111-ADJ, ISL9111A -ADJ),

the output voltage is programmed by connecting two external

voltage divider resistors among OUT, FB and GND (see “Block

Diagram: ISL9111-ADJ, ISL9111A-ADJ” on page 2).

Output Voltage Setting Resistor Selection

output voltage values. The output voltage can be calculated using

Equation 1:

typical). The current flowing through the divider resistors is

minimize current into the divider and thus improve the total

the feedback pin of the device to prevent noise pickup.

FIGURE 6. RECOMMENDED EVALUATION BOARD LAYOUT

GND

GND

-------

+









=

(EQ. 1)