TLS115D0LD datasheet(9/26 Pages) INFINEON

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TLS115D0

High Precision Voltage Tracker

General product characteristics

Data Sheet

Rev. 1.00

2016-10-13

Table 4

Thermal resistance TLS115D0LD in PG-TSON-10 package

Parameter

Symbol

Values

Unit Note or

Test Condition

Number

Min.

Typ.

Max.

Junction to case1)

1) Not subject to production test, specified by design.

RthJC

–

K/W

–

P_3.3.7

Junction to pin1)

RthJP

–

K/W

–

P_3.3.8

Junction to ambient1)

RthJA

–67

–

K/W

2s2p board2)

2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The product (chip

and package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 2 inner copper layers (2×70µm Cu, 2×35µm Cu).

Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.

P_3.3.9

Junction to ambient1)

RthJA

–

194

–

K/W

1s0p board, footprint

only3)

3) Specified RthJA value is according to JEDEC JESD 51-3 at natural convection on FR4 1s0p board; The product (chip and

package) was simulated on a 76.2×114.3×1.5 mm3 board with 1 copper layer (1 x 70 µm Cu).

P_3.3.10

Junction to ambient1)

RthJA

–

K/W

1s0p board, 300 mm2

heatsink area on PCB3)

P_3.3.11

Junction to ambient1)

RthJA

–

K/W

1s0p board, 600 mm2

heatsink area on PCB3)

P_3.3.12

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